K
kaustav
Guest
Hi,
am having a problem while trying to layout a poly capacitor while using
AMS 3.40 with the tech -csd option.
The predefined layout in PRIMLIB for cpoly shows metal1 contacts to
poly1 and poly2 layers.
I am using the same layers with dimensions modified.
If I use the 'Mark Net' option it shows both metal contacts to be on
the same net.
LVS then fails to recognize the capacitor since it cannot distinguish
two separate terminals.
I thought this might be caused by the layer CONT being common to both
poly1-metal1 and poly2-metal1 contacts.
So I extended poly2 outside poly1 and made the poly2-metal1 contact in
the extended region.
DRC now gives the error 'E1P1P2'
any solutions/workarounds to this?
thanks
Kaustav
am having a problem while trying to layout a poly capacitor while using
AMS 3.40 with the tech -csd option.
The predefined layout in PRIMLIB for cpoly shows metal1 contacts to
poly1 and poly2 layers.
I am using the same layers with dimensions modified.
If I use the 'Mark Net' option it shows both metal contacts to be on
the same net.
LVS then fails to recognize the capacitor since it cannot distinguish
two separate terminals.
I thought this might be caused by the layer CONT being common to both
poly1-metal1 and poly2-metal1 contacts.
So I extended poly2 outside poly1 and made the poly2-metal1 contact in
the extended region.
DRC now gives the error 'E1P1P2'
any solutions/workarounds to this?
thanks
Kaustav