LVS Error

Hello,

I'm using a technology by Atmel. I can run the DRC and it's clean
except for a couple of warnings which are ok. But, my LVS keeps
failing no matter how simple a circuit I try to run. I strongly
believe that the LVS command itself is failing and not the circuit,
meaning it doesn't even get to the point to where it's checking the
circuit. I get this error:

Job '/<directory path>/LVS' that was started at <date and time> has
failed. Is anyone familiar with this error? Is it saying that my
circuit failed or that LVS itself is not running.

I did LVS check with netlist of schematic because when I had the
extraction option also checked I got the error that the extraction is
not defined. As a check, I tried a very very simple circuit with
resistors basically and it failed as well when I'm pretty sure of the
connections. I don't know much about LVS so does anyone know how can I
tell if my circuit failed or LVS is not running. I tried to check the
error by pressing on the button "Error Display" but it said that the
netlist is invalid and that you must initialize the LVS run with a
valid LVS directory before you can probe. Any help will be much
appreciated. Thanks

 

[vdvalk@rogers.com]

Areyou sure you have run a proper layout extraction?
Before you can get LVS to start, you need both an up to date extraction
of the schematic (done in place!) and an
up to date extraction of the layout (usually into an extracted rep).

You will need to get here before you can even thick to start LVS.

So I would strart by taking your simple layout and running an extract
on it and looking at the output.
( The extraction rep needs to have devices in it (sometimes called
ivpcells or other names). A simple viewing of
the extract deck and finding the device() commands should tell you what
they are called.

Once this extracted rep is created ( and an up to date schematic
exists) then the LVS engine can begin.

LVS will create two different flat netlists for the schematic and
layout(actually extracted) and then performs
a trival graph isomorphic anaysis to find if they are the same. The LVS
deck will show you what kinds of
matching are being looked for.

(note that proper CDF on devices is required for the netlisters to work
properly. Code with unexpected "nil"
values on properties or missing "required" properties will often crash
the netlisting phase.)

Debugging the crashing of LVS after netlisting and before comparison is
tricky.

It is a very good idea to start with a simple (not too simple ) test
case to get this going.

I like to then create a test case that exercises each device to test
the CDF of each device.

Then I like to build a test case specifically to test the limits of
parameters and unusual parameters on each device each
in its own test case. ( Then again, i was in a role where I was
building and testing PDK's that we made ... )

YMMV

-- Gerry

 

[Edward Kalenda]

On 15 Jan 2006 04:53:16 -0800, mxkdirs@yahoo.com wrote:

Hello,

I'm using a technology by Atmel. I can run the DRC and it's clean
except for a couple of warnings which are ok. But, my LVS keeps
failing no matter how simple a circuit I try to run. I strongly
believe that the LVS command itself is failing and not the circuit,
meaning it doesn't even get to the point to where it's checking the
circuit. I get this error:

Job '/<directory path>/LVS' that was started at <date and time> has
failed. Is anyone familiar with this error? Is it saying that my
circuit failed or that LVS itself is not running.

I did LVS check with netlist of schematic because when I had the
extraction option also checked I got the error that the extraction is
not defined. As a check, I tried a very very simple circuit with
resistors basically and it failed as well when I'm pretty sure of the
connections. I don't know much about LVS so does anyone know how can I
tell if my circuit failed or LVS is not running. I tried to check the
error by pressing on the button "Error Display" but it said that the
netlist is invalid and that you must initialize the LVS run with a
valid LVS directory before you can probe. Any help will be much
appreciated. Thanks

Look in the LVS run directory. There should be a .out and a .log file in
there. One of the output from OSS netlisting code. The other is from the
LVS program. You can tell the difference since the one from LVS starts
with the LVS version information. The OSS output has a bunch of stuff
about what is being netlisted, switch views, stop views, and other odd
things.

It sounds like LVS itself may not be running due to a netlisting
problem. There should be something indicating this in the OSS output.
There may also be a problem with search paths and such. Again, the OSS
output is the place to look.

I would start by using your schematic cellview for the schematic AND
extracted cell information. This should netlist and compare smoothly.
Then you can Verify/Extract the layout and use the extracted view
instead of the schematic view in the extracted cell information.