lvs and cdl netlists

K

kev

Guest
Hi all,

I am having terrible trouble trying to do a simple lvs on a standard
cell.
I have an inverter instanciated in my test schematic. I have a cdl
netlist
supplied for this inverter. It will not LVS. I have included the
netlist under the
netlisting options on the top of the assura form - I am not sure if it
is even being used
and I get an error saying lastSchemticProperty was not set on my
testbench schematic.
I don't want to use block boxes. We have a cdl with transistors so I
really want to compare.
Someone must have encountered this problem before....any ideas/help?

regards
kev
 
and I get an error saying lastSchemticProperty was not set on my
testbench schematic.
I don't want to use block boxes. We have a cdl with transistors so I
really want to compare.
Someone must have encountered this problem before....any ideas/help?
I guess you have created yourself a symbol for the inverter.

You need to create an auLvs view for it, so that assura treats this component as a leaf cell when
netlisting. If this view is missing, it'll try to switch to another view, eventually it will fail
because it cannot find a switch view or finds a wrong one (symbol in your case, i guess).

To create auLvs view, copy the symbol view to auLvs. You may need to edit the CDF simInfo.

Stéphane
 
On Apr 5, 11:43 am, "S. Badel" <stephane.ba...@REMOVETHISepfl.ch>
wrote:
and I get an error saying lastSchemticProperty was not set on my
testbench schematic.
I don't want to use block boxes. We have a cdl with transistors so I
really want to compare.
Someone must have encountered this problem before....any ideas/help?

I guess you have created yourself a symbol for the inverter.

You need to create an auLvs view for it, so that assura treats this component as a leaf cell when
netlisting. If this view is missing, it'll try to switch to another view, eventually it will fail
because it cannot find a switch view or finds a wrong one (symbol in your case, i guess).

To create auLvs view, copy the symbol view to auLvs. You may need to edit the CDF simInfo.

Stéphane
Hi Stephane,

No I had the symbol but created a spectre view so that I can simulate
it in artist with the cdl netlist converted to spectre format. I have
tried to update the simIfo section with the pin sames but I guess I
need some information regarding the netlsitprocedure etc. Now I have
the following errors:

Running Artist Hierarchical Netlisting ...
*Error* Cell: INVX20 in library: KK_TEST is missing a simInfo
section in it's CDF for the current simulator.
*Error* artIsCallablep: argument #1 should be either a string or a
symbol (type template = "S") - n
il


I have emailed cadence support but I think they are away for Easter
hols...Anyone got any idea what
to put in the siminfo section..

Kev
 
On Apr 5, 9:48 am, "kev" <kevin.kelli...@gmail.com> wrote:
On Apr 5, 11:43 am, "S. Badel" <stephane.ba...@REMOVETHISepfl.ch
wrote:

and I get an error saying lastSchemticProperty was not set on my
testbench schematic.
I don't want to use block boxes. We have a cdl with transistors so I
really want to compare.
Someone must have encountered this problem before....any ideas/help?

I guess you have created yourself a symbol for the inverter.

You need to create an auLvs view for it, so that assura treats this component as a leaf cell when
netlisting. If this view is missing, it'll try to switch to another view, eventually it will fail
because it cannot find a switch view or finds a wrong one (symbol in your case, i guess).

To create auLvs view, copy the symbol view to auLvs. You may need to edit the CDF simInfo.

Stéphane

Hi Stephane,

No I had the symbol but created a spectre view so that I can simulate
it in artist with the cdl netlist converted to spectre format. I have
tried to update the simIfo section with the pin sames but I guess I
need some information regarding the netlsitprocedure etc. Now I have
the following errors:

Running Artist Hierarchical Netlisting ...
*Error* Cell: INVX20 in library: KK_TEST is missing a simInfo
section in it's CDF for the current simulator.
*Error* artIsCallablep: argument #1 should be either a string or a
symbol (type template = "S") - n
il

I have emailed cadence support but I think they are away for Easter
hols...Anyone got any idea what
to put in the siminfo section..

Kev
For LVS, try removing symbol from the "view list" on the netlist
option.
 

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