K
karl.bengtsson
Guest
Hello.
I have a design targeting the (ancient, perhaps) Actel A54SX32A. Durin
testing I exposed several of the input pins to signals with extremly lo
slewrate, using a power-supply to supply the input. This was most likel
way outside the minimum slewrate requrements for the device.
The FPGA seems to be working and it passes all functional tests, but th
current to the core is way to large at about 70mA. Sadly, I did not measur
the current beforehand and the cost of a new (ceramic) FPGA prohibits m
from just burning a new one to test that. A freshly burned plastic FPG
works fine and consumes the expected current.
Does anyone have any experience with destroying FPGAs due to low slewrates
Is this even probable?
Also, Hello everyone. This is my first post here, Ive been "lurking" so t
speak, and there seems to be a lot of talanted people here.
Regards!
Kalle
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Posted through http://www.FPGARelated.com
I have a design targeting the (ancient, perhaps) Actel A54SX32A. Durin
testing I exposed several of the input pins to signals with extremly lo
slewrate, using a power-supply to supply the input. This was most likel
way outside the minimum slewrate requrements for the device.
The FPGA seems to be working and it passes all functional tests, but th
current to the core is way to large at about 70mA. Sadly, I did not measur
the current beforehand and the cost of a new (ceramic) FPGA prohibits m
from just burning a new one to test that. A freshly burned plastic FPG
works fine and consumes the expected current.
Does anyone have any experience with destroying FPGAs due to low slewrates
Is this even probable?
Also, Hello everyone. This is my first post here, Ive been "lurking" so t
speak, and there seems to be a lot of talanted people here.
Regards!
Kalle
---------------------------------------
Posted through http://www.FPGARelated.com