loop question

R

Richard

Guest
Hello

I have I quick question:

I have a combinatorical process which should be activated everytime the
input changes. In this process the bits should be stored in the following
way:

signal c: std_ulogic_vector(199 downto 0);

comb : process (inp)
begin
for i in 0 to 599 loop
c(i) <= inp(3*i);
end loop;

Unfortunately the compiler doesnt allow loops in this kind of process
(sequentiell statement). Is there any other loop construct which I could use
to perform this easy assignment?

Thanks a lot!
 
Richard a écrit :
Hello

I have I quick question:

I have a combinatorical process which should be activated everytime the
input changes. In this process the bits should be stored in the following
way:

signal c: std_ulogic_vector(199 downto 0);

comb : process (inp)
begin
for i in 0 to 599 loop
c(i) <= inp(3*i);
end loop;

Unfortunately the compiler doesnt allow loops in this kind of process
(sequentiell statement). Is there any other loop construct which I could use
to perform this easy assignment?
Click to expand...
Hello Richard
Loops are allowed inside any process. The problem I see there is that c
is 200 bits long and your loop iterates 600 times.
What exactly do you want to do?
--
____ _ __ ___
| _ \_)/ _|/ _ \ Adresse de retour invalide: retirez le -
| | | | | (_| |_| | Invalid return address: remove the -
|_| |_|_|\__|\___/
 
On Fri, 14 Jan 2005 16:22:03 -0000, "Richard" <carlsberg@gmx.at>
wrote:

Hello

Thanks for your answers, here is the complete code fragment:

comb : process(inp)
begin

for i in 0 to (width/3)-1 loop
c0((2*i+1) downto (2*i))<=inp((6*i+1) downto (6*i));
c1((2*i+1) downto (2*i))<=inp((6*i+3) downto (6*i+2));
c2((2*i+1) downto (2*i))<=inp((6*i+5) downto (6*i+4));
end loop;
Click to expand...
My Quartus doesn't allow things like this...
What i must do is
c0[2*i+1) <= inp(6*i+1);
c0[2*i) <= inp(6*i);
etc

Nick
 
"Egbert Molenkamp" <molenkam_no_spam@cs.utwente.nl> schreef in bericht
news:csapnn$8tk$1@ares.cs.utwente.nl...
Notice that the error message gives exactly the answer.
The generate statement is a concurrent statement. So you may use it as a
sequential statement (in a process, procedure and function).
.... of course this should be: you may NOT use it ...
Click to expand...
Egbert Molenkamp
 
Hello

Thanks for your answers, here is the complete code fragment:

comb : process(inp)
begin

for i in 0 to (width/3)-1 loop
c0((2*i+1) downto (2*i))<=inp((6*i+1) downto (6*i));
c1((2*i+1) downto (2*i))<=inp((6*i+3) downto (6*i+2));
c2((2*i+1) downto (2*i))<=inp((6*i+5) downto (6*i+4));
end loop;

term0 <= c2((2*width/3)-1 downto 0) & c1((2*width/3)-1 downto 0) &
c0((2*width/3)-1 downto 0);
term1 <= c1((2*width-19) downto 0) & (17 downto 0 => '0');

adder: for I in 0 to (width-1) generate
add1_I: add port
map(term0(2*I+1),term0(2*I),term1(2*I+1),term1(2*I),pp1(2*I+1),pp1(2*I));
end generate;

end process;

The problem is since I introduced the first for loop in the comb process I
get an error message with
the generate statement

adder: for I in 0 to (width-1) generate
add1_I: add port
map(term0(2*I+1),term0(2*I),term1(2*I+1),term1(2*I),pp1(2*I+1),pp1(2*I));

Error message:

Illegal sequential statement.

At the beginning I had the first for-loop in the seqentiel logic, then
everything worked properly! I dont know what is going on now. The adder is a
simple adder module constisting of a few logical gates.

Does anybody of you know what went wrong?

Thanks again!
 
"Richard" <carlsberg@gmx.at> wrote in message
news:34q5rlF4cfopkU1@individual.net...
Hello

I have I quick question:

I have a combinatorical process which should be activated everytime the
input changes. In this process the bits should be stored in the following
way:

signal c: std_ulogic_vector(199 downto 0);

comb : process (inp)
begin
for i in 0 to 599 loop
c(i) <= inp(3*i);
end loop;

Unfortunately the compiler doesnt allow loops in this kind of process
(sequentiell statement). Is there any other loop construct which I could
use
to perform this easy assignment?

Thanks a lot!
Click to expand...
Notice that the index i is out of the range of signal c. Maybe that is the
problem?
The following example simulates and is synthesisable (with the tool I use).

library ieee;
use ieee.std_logic_1164.all;
entity tstlp is
port (a : in std_logic_vector(12 downto 0);
b : out std_logic_vector(4 downto 0));
end tstlp;

architecture beh of tstlp is

begin
comb : process (a)
begin
for i in 0 to 4 loop
b(i) <= a(3*i);
end loop;
end process;

end beh;

Egbert Molenkamp
 
Notice that the error message gives exactly the answer.
The generate statement is a concurrent statement. So you may use it as a
sequential statement (in a process, procedure and function).
Maybe the "end process" should move upwards just after the end of the first
loop.
comb : process(inp)
begin

for i in 0 to (width/3)-1 loop
c0((2*i+1) downto (2*i))<=inp((6*i+1) downto (6*i));
c1((2*i+1) downto (2*i))<=inp((6*i+3) downto (6*i+2));
c2((2*i+1) downto (2*i))<=inp((6*i+5) downto (6*i+4));
end loop;
end process; --HERE
Click to expand...

Then the first process, with lable COMB, behaves combinational. All input
signals are in the sensitivity list (in this case INP).
Furthermore after this move a change of c0 will change term0 immediatly
(more precily after one delta). In your case term0 is changed after a second
second change of INP.

Egbert Molenkamp

"Richard" <carlsberg@gmx.at> schreef in bericht
news:34q9lvF4avjgvU1@individual.net...
Hello

Thanks for your answers, here is the complete code fragment:

comb : process(inp)
begin

for i in 0 to (width/3)-1 loop
c0((2*i+1) downto (2*i))<=inp((6*i+1) downto (6*i));
c1((2*i+1) downto (2*i))<=inp((6*i+3) downto (6*i+2));
c2((2*i+1) downto (2*i))<=inp((6*i+5) downto (6*i+4));
end loop;

term0 <= c2((2*width/3)-1 downto 0) & c1((2*width/3)-1 downto 0) &
c0((2*width/3)-1 downto 0);
term1 <= c1((2*width-19) downto 0) & (17 downto 0 => '0');

adder: for I in 0 to (width-1) generate
add1_I: add port
map(term0(2*I+1),term0(2*I),term1(2*I+1),term1(2*I),pp1(2*I+1),pp1(2*I));
end generate;

end process;

The problem is since I introduced the first for loop in the comb process I
get an error message with
the generate statement

adder: for I in 0 to (width-1) generate
add1_I: add port
map(term0(2*I+1),term0(2*I),term1(2*I+1),term1(2*I),pp1(2*I+1),pp1(2*I));

Error message:

Illegal sequential statement.

At the beginning I had the first for-loop in the seqentiel logic, then
everything worked properly! I dont know what is going on now. The adder is
a simple adder module constisting of a few logical gates.

Does anybody of you know what went wrong?

Thanks again!
Click to expand...
 
You must log in or register to reply here.

Welcome to EDABoard.com

Sponsor

Back
Top