S
Shanthi Pavan
Guest
Hi,
I want to implement a look-up table in Verilog-A. Earlier posts
indicate that it is possible, but I couldnt find any refrence to this
in the Verlilog-A documentation. Am I missing something here ? Any
help is greatly appreciated.
-Shanthi
I want to implement a look-up table in Verilog-A. Earlier posts
indicate that it is possible, but I couldnt find any refrence to this
in the Verlilog-A documentation. Am I missing something here ? Any
help is greatly appreciated.
-Shanthi