Looking for Synario 3.0 (Lattice)

[Fabio G.]

Hello,
I have to work with legacy devices (Lattice Isp1032-60 and Isp1032E-70),
and I'm looking for Synario 3.0 because I must update some projects that
were made with that program version.
I need Synario 3.0 also because newer versione of this software do not
support those old CPLD.
Can someone help me?

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[Dwayne Surdu-Miller]

Hi Fabio,

I'd recommend checking with Lattice and asking whether the oldest
versions of their logic design software support ISP1032 and ISP1032E.
Someone there should have a legacy software package that will help you.

Otherwise, you're kinda stuck. Synario was bought by Xilinx, I believe.
I doubt that they'll be able to help you out.
( but one never knows until one explores a little )

If you need only view the old Synario ECS schematics, I believe the
latest Lattice design software will at least let you do that much.

Best regards,
Dwayne Surdu-Miller

 

[Fabio G.]

Hello Dwayne,
first I want to thank you for your answer.

You wrote:

I'd recommend checking with Lattice and asking whether the oldest
versions of their logic design software support ISP1032 and ISP1032E.
Someone there should have a legacy software package that will help you.

The situation is the following: about 5 years ago a my ex-colleague
started a project with Synario 3.0 and then discontinued it.
Now I have to resume his work and improve it.
I have searched in our software archive but Synario 3.0 cannot be found.
I only found some old floppy disk of the "Lattice IspPDS 2.71 software"
that is unuseful to me (moreover, the hardware key license does not work
properly...).
I looked on internet and downloaded Synario 5.1 : it opens my .syn files
but it says that it can't proceed correctly because the project was
saved with a ISP1032-60 , and that version of software supports only
ISP1032E series. This should NOT be a problem, because in our warehouse
we also have a ISP1032-70 device.
If I choose the ISP1032-70 device the program starts.
Then I can see schematic and ABEL files, BUT when I try to complete che
fitting process, a fatal and very strange error occurs: the report says
something like: ".....**name_of_the_command_line_invoked** : error code
-1 : failed to spawn child process "
??? It is NOT an error about the project : it seems an error regarding
some failure in the operating system (I use Windows 98: is it too
"recent" for that version of Synario??)... ???

So I downloaded the latest software ISPLever from Lattice site, but it
does not support neither 1032 nor 1032E .... :-(

It seems that the only solution (assuming that I'm not able to resolve
that strange error) is to find Synario 3.0 .... : I'll try to re-contact
my ex-colleague.

Or.... is there another solution??
Do exist some other tools that can be used?
For example, is it possible to use a third part software (and then load
the EDIF file in PDS?) ?

I doubt that they'll be able to help you out.

In fact: in the site there are very few info

If you need only view the old Synario ECS schematics, I believe the
latest Lattice design software will at least let you do that much.

Well, as I said above, I can see the schematics, but I have to modify
them and to program a board with that old device (I can't migrate to a
newer device: the pinout would be incompatible)

Thank you again for your support,
Fabio

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[Jim Granville]

Fabio G. wrote:

Hello Dwayne,
first I want to thank you for your answer.

You wrote:


I'd recommend checking with Lattice and asking whether the oldest
versions of their logic design software support ISP1032 and ISP1032E.
Someone there should have a legacy software package that will help you.


The situation is the following: about 5 years ago a my ex-colleague
started a project with Synario 3.0 and then discontinued it.
Now I have to resume his work and improve it.
I have searched in our software archive but Synario 3.0 cannot be found.
I only found some old floppy disk of the "Lattice IspPDS 2.71 software"
that is unuseful to me (moreover, the hardware key license does not work
properly...).
I looked on internet and downloaded Synario 5.1 : it opens my .syn files
but it says that it can't proceed correctly because the project was
saved with a ISP1032-60 , and that version of software supports only
ISP1032E series. This should NOT be a problem, because in our warehouse
we also have a ISP1032-70 device.
If I choose the ISP1032-70 device the program starts.
Then I can see schematic and ABEL files, BUT when I try to complete che
fitting process, a fatal and very strange error occurs: the report says
something like: ".....**name_of_the_command_line_invoked** : error code
-1 : failed to spawn child process "
??? It is NOT an error about the project : it seems an error regarding
some failure in the operating system (I use Windows 98: is it too
"recent" for that version of Synario??)... ???

So I downloaded the latest software ISPLever from Lattice site, but it
does not support neither 1032 nor 1032E .... :-(

It seems that the only solution (assuming that I'm not able to resolve
that strange error) is to find Synario 3.0 .... : I'll try to re-contact
my ex-colleague.

Or.... is there another solution??

If you can load, and get partway along the tool flow, that is some progress.

Dig about and see what files have been produced - the engine of Synario
is ABEL, plus vendor specific fitters.

Fitters commonly use BLIF, PLA, or sometimes EDIF files, so try and
find the .EXE that is the fitter for your old device.

"failed to spawn child process" could simply mean it was unable to find
the fitter, and if you can manually launch the fitter, it will work ok.

Talk with lattice, they should know what these legacy fitter(s) are
called, as well as file and calling methods for command line operation.

-jg

 

[Fabio G.]

Jim Granville <no.spam@designtools.co.nz> wrote in message news:<_Jwoc.1581$FN.172196@news02.tsnz.net>...

Fitters commonly use BLIF, PLA, or sometimes EDIF files, so try and
find the .EXE that is the fitter for your old device.

"failed to spawn child process" could simply mean it was unable to find
the fitter, and if you can manually launch the fitter, it will work ok.

The following process are ok:
- Update all schematic files OK
- Link design OK
Linked equations OK
- Fit design OK
Prefit equations OK
Signal cross reference OK
Jedec File *** FAIL ***

This is the reported message:

Synario Auto-Make Log File
--------------------------

Updating: JEDEC File

Starting: 'C:\ISPDSPS\ISPSYN\BIN\SYNDPM.EXE -i pldhcc.tt2 -if pla -p
ispLSI1032E-70LJ84 -z -of verilog -of vhdl'

Received process exit status -1
Possible system problem to spawn child process
Done: failed with exit code: -001.
----------------------------

I tried to execute that command line from MS-DOS, but SYNDPM does not
verbose anything.

Here:
http://www.fpga-faq.com/archives/09650.html#9664

....I found that someone had the same problem, but there is no
answer...

Talk with lattice, they should know what these legacy fitter(s) are
called, as well as file and calling methods for command line operation.

I'll try to contact them.

Thank you very much
Fabio

 

[Jim Granville]

Fabio G. wrote:

Jim Granville <no.spam@designtools.co.nz> wrote in message news:<_Jwoc.1581$FN.172196@news02.tsnz.net>...


Fitters commonly use BLIF, PLA, or sometimes EDIF files, so try and
find the .EXE that is the fitter for your old device.

"failed to spawn child process" could simply mean it was unable to find
the fitter, and if you can manually launch the fitter, it will work ok.


The following process are ok:
- Update all schematic files OK
- Link design OK
Linked equations OK
- Fit design OK

but presumably there is no .JED file at this stage ?

Prefit equations OK
Signal cross reference OK
Jedec File *** FAIL ***

This is the reported message:

Synario Auto-Make Log File
--------------------------

Updating: JEDEC File

Starting: 'C:\ISPDSPS\ISPSYN\BIN\SYNDPM.EXE -i pldhcc.tt2 -if pla -p
ispLSI1032E-70LJ84 -z -of verilog -of vhdl'

Some educated guesses based on other fitters I've used :
SYNDPM.EXE is the lattice fitter (it may need some library files)
-i pldhcc.tt2 -> Input file is PLA format pldhcc.tt2 ( your compiled
design )
-if pla -> confirms format, ( may also allow EDIF or BLIF options)
-p ispLSI1032E-70LJ84 -> Physical device/package to target FIT to
-z -> ?
-of verilog -> output format

If you are getting a .TT2 file, all your sources are
compiling/reducing to boolean eqns OK, you just need to get the
fitter to co-operate
It is the right version fitter ?

Received process exit status -1
Possible system problem to spawn child process
Done: failed with exit code: -001.
----------------------------

I tried to execute that command line from MS-DOS, but SYNDPM does not
verbose anything.

I do not have syndpm.exe, but with Atmel's fitters
fit15xx.exe gives a short help list
fit15xx.exe -h2 gives a full help list
fit15xx.exe -h2 >Fit15xx.TXT dumps that help to the .TXT file
(etc)
if theirs does not give help from blank command line, you could
trawl the .EXE in a file viewer - eg to check your SYNDPM version
is correct for your device, verify you can find target
ispLSI1032E-70LJ84 inside the .EXE

move your .PLA to the fitter/fitlib dir, and try simpler command lines.

Well behaved fitters SHOULD be able to take a PLA file, and create a JED
with a minimal command line.


-jg

 

[Fabio G.]

Jim Granville <no.spam@designtools.co.nz> ha scritto:

- Fit design OK

but presumably there is no .JED file at this stage ?

Yes, that is the problem :-(

Before answering to your message, I would like to update you about the
current situation: in the afternoon I've made some progress.
Assumed that SYNDPM of Synario 3.0 does not work properly, I tried to
use the SYNDPM file that I found in a directory of the recent ISPLever
4.0 . This did not give benefits (device not supported, missing DLL,
ecc...).
So I started to read some PDF documentation about Synario: I realized
that the design flow chain can be as follows:
- use Synario to make SCH, ABL files, ecc.
- use Synario to perform some steps of synthetization process (until the
Pre-fit step: you get the .tt2 file)
- import the .tt2 file in IspPDS+ software
- check pinout assigment
- compile --> obtatin JEDEC file

With this sequece it *seems* that the synthesis is ok: I tried to make a
new very simple design from scratch and it worked fine.
I'm still having some troubles in importing the old design but these
troubles *should* be overcomed.

Now your message:

-i pldhcc.tt2 -> Input file is PLA format pldhcc.tt2 ( your compiled
design )

Right

-of verilog -> output format

This is the output format used for post-synthesis simulation?
I expected that output file was also the .jed file, right?

compiling/reducing to boolean eqns OK, you just need to get the
fitter to co-operate
It is the right version fitter ?

Yes, it is: it is the default fitter installed with the package

fit15xx.exe -h2 gives a full help list

I tried /? /h -h ... but nothing....

if theirs does not give help from blank command line, you could
trawl the .EXE in a file viewer
- eg to check your SYNDPM version
is correct for your device, verify you can find target
ispLSI1032E-70LJ84 inside the .EXE

Good idea, I did not think to that! ;-)

move your .PLA to the fitter/fitlib dir, and try simpler command lines.

Good suggestion: I'll try it

Let me ask you another question: If I would want to syinthetize a
project using VHDL, which third party software could I use?
Something like Leonardo Spectrum, for example? (it creates an EDIF file
that is then imported from IspPDS+)

Just two last things to note:

1) In 1998 another person had my same problem! :
http://www.fpga-faq.com/archives/09650.html#9663
....but nobody answered to his message.
I wrote to that person but he could not be able to help me.

2) This morning I wrote to Lattice, and this evening they aswered asking
futher information and giving a first suggestion:
"Fabio,

The only thing I can suggest is to uninstall and reinstall the software.
Somehow the ini files for the doftware might be pointing to another
software. "

....not big helpful.... I'll try to reinstall... who knows what will
happen.... ;-)

Thank you again, Jim, for your useful support.

Regards,
Fabio

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[Jim Granville]

Fabio G. wrote:
<snip>

- use Synario to make SCH, ABL files, ecc.
- use Synario to perform some steps of synthetization process (until the
Pre-fit step: you get the .tt2 file)
- import the .tt2 file in IspPDS+ software
- check pinout assigment
- compile --> obtatin JEDEC file

With this sequece it *seems* that the synthesis is ok: I tried to make a
new very simple design from scratch and it worked fine.

This was for your needed ispLSI1032E-70LJ84 - or a newer device/fitter ?

<snip>

-of verilog -> output format


This is the output format used for post-synthesis simulation?
I expected that output file was also the .jed file, right?

oops, yes, I forgot to mention that implicit one

fit15xx.exe -h2 gives a full help list


I tried /? /h -h ... but nothing....

Don't you love Sw that does this!

Part of it is 'muddled security thinking', and I know
Synario used encryption that caused them many problems.
Still, a _fitter_ is not something to be paranoid about,
as the target devices make great dongles, surely ?

Let me ask you another question: If I would want to syinthetize a
project using VHDL, which third party software could I use?
Something like Leonardo Spectrum, for example? (it creates an EDIF file
that is then imported from IspPDS+)

I think lattice offer a VHDL flow, but for 32 MC CPLDs
I'd suggest you stick with ABEL ( Xilinx still offer that )
ABEL (& CUPL) allows creation of test vectors in the JED file.

-jg

 

[Fabio G.]

Jim Granville <no.spam@designtools.co.nz> wrote in message news:<guSoc.1853$FN.204427@news02.tsnz.net>...

With this sequece it *seems* that the synthesis is ok: I tried to make a
new very simple design from scratch and it worked fine.

This was for your needed ispLSI1032E-70LJ84 - or a newer device/fitter ?

Sorry, I don't fully understand what you mean.
I have an old Synario project saved for ispLSI1032-60 (that is not
supported by Synario 5.1), but I have available also a ispLSI1032E-70
(supported).
With the new design flowchain that I found, it seems that I'm able to
work properly with 1032E.

If also Synario would work properly (that is, if SYNDPM would not give
the "spawn child error"), I could work only with Synario without
IspPDS, I think.

I think lattice offer a VHDL flow, but for 32 MC CPLDs

I found references about a "ISPvhdl" tool: it could be useful to me.

I looked in SYNDPM.exe with an HEX file viewer.
I found some messages:

LatticeStdioWinID LatticeAppQuit LatticeAppStart suspend continue
terminate beat SYNDPM EXIT MESSAGE Syndpm Exiting %d
PDS_SYNDPM_DEBUG SYNDPM DEBUG MESSAGE SYNDPM CLOSING APPLICATION
SynDPM Closing Application %d, imm:%d SYNDPM abel_yield ended
SYNDPM MESSAGE Syndpm break received %d %s SYNDPM abel_yield
started Sent Heart Beat to Synario environment SYNDPM To Synario
PDS_SYNDPM_HEARTMSG %s: Child process (%d) exited with status:%d.
Wait Child *** Process is gone?...
Child process ID = %d, is active.
PDS_SYNDPM_CHILDPROC %s: Wait Child *** received child %d quit
with status %d
%s: Wait Child *** received child %d started.
No response from LSC Compiler...
Click cancel to abort returning from spawnvp.
%s: Using Current Child Id (%d) instead of handle.
%s: Child Proc %s ID -- %d
Request to close syndpm received. Syndpm exiting with status %d
%s
%s
****HERE ******** Received process exit status -1 Possible system
problem to spawn child process PDS_DPM_EXE SYNDPM LICENSE ERROR
for the ispDS+ 5.1 compiler.
FlexLM License file must be copied to the above location
License file %s not found.
Application Registered SYNDPM DEBUG ispDS+ rt PDS_SYNDPM_ARGS
LATTICE_CONSOLE_ID=%u %s/bin/dpm.exe Environment Variable PDSPLUS
is undefined. PDSPLUS=d:\pdsplus PDSPLUS=%s
PATH=%s
PATH=%s\bin;%s; PATH Cannot open current context SYNDPM CONTEXT
Env License File Set License File
LM_LICENSE_FILE=%s\license\license.dat PDS_LIC=%s PDSPLUS=%s
LM_LICENSE_FILE=%s FOUND LM_LICENSE_FILE LM_LICENSE_FILE PDSLic
PDS_LIC Failed to get PDSPLUS context string SYNARIO PDSPath ENV
PDSPath SYNARIO PDSPLUS ENV PDS_SYNDPM_ENV PDSPLUS syndpm.log wt
PDS_SYNDPM_LOG=1 c:\tmp\syndpm.log PDS_STDIO_DEBUG=1
c:\tmp\syndpm.sio PDS_SYNDPM_HEARTMSG=1 c:\tmp\syndpm.hbt
PDS_SYNDPM_ENV=1 c:\tmp\syndpm.env PDS_SYNDPM_ARGS=1
c:\tmp\syndpm.arg PDS_SYNDPM_DIOMSG=1 c:\tmp\syndpm.msg
PDS_SYNDPM_DEBUG=1 c:\tmp\syndpm.dbg PDS_SYNDPM_LOG SYNDPM
TKOutputProcMsg Data String(%d): '%s' PDS_SYNDPM_DIOMSG Syndpm
Terminate msg received %d OWNER_PROCESS CREATE COM WINDOW %s:
Failed to Create Application's COM window.
STDIO PROC %d laStdioCommClass



There are references to environment variable to set, and many other
things... : I tried to set some variables: something strange happens
(the hard disk works for more time than when no variable are set),
but the result is negative.

Even when not setting anything, I noticed that after sending the
command line, a short windows appear and suddendly disappears: it
could be the "child" process that generates the problem to SYNDPM....

Maybe with other changes I could find the solution, but I've already
lost too much time: I'll try to use the alternative design flow chain.

Thank you again,
Bye!

 

[Jim Granville]

Fabio G. wrote:
<snip>

I looked in SYNDPM.exe with an HEX file viewer.
I found some messages:

LatticeStdioWinID LatticeAppQuit LatticeAppStart suspend continue
terminate beat SYNDPM EXIT MESSAGE Syndpm Exiting %d
PDS_SYNDPM_DEBUG SYNDPM DEBUG MESSAGE SYNDPM CLOSING APPLICATION
SynDPM Closing Application %d, imm:%d SYNDPM abel_yield ended
SYNDPM MESSAGE Syndpm break received %d %s SYNDPM abel_yield
started Sent Heart Beat to Synario environment SYNDPM To Synario
PDS_SYNDPM_HEARTMSG %s: Child process (%d) exited with status:%d.
Wait Child *** Process is gone?...
Child process ID = %d, is active.
PDS_SYNDPM_CHILDPROC %s: Wait Child *** received child %d quit
with status %d
%s: Wait Child *** received child %d started.
No response from LSC Compiler...
Click cancel to abort returning from spawnvp.
%s: Using Current Child Id (%d) instead of handle.
%s: Child Proc %s ID -- %d
Request to close syndpm received. Syndpm exiting with status %d
%s
%s
****HERE ******** Received process exit status -1 Possible system
problem to spawn child process PDS_DPM_EXE SYNDPM LICENSE ERROR
for the ispDS+ 5.1 compiler.
FlexLM License file must be copied to the above location
License file %s not found.
Application Registered SYNDPM DEBUG ispDS+ rt PDS_SYNDPM_ARGS
LATTICE_CONSOLE_ID=%u %s/bin/dpm.exe Environment Variable PDSPLUS
is undefined. PDSPLUS=d:\pdsplus PDSPLUS=%s
PATH=%s
PATH=%s\bin;%s; PATH Cannot open current context SYNDPM CONTEXT
Env License File Set License File
LM_LICENSE_FILE=%s\license\license.dat PDS_LIC=%s PDSPLUS=%s
LM_LICENSE_FILE=%s FOUND LM_LICENSE_FILE LM_LICENSE_FILE PDSLic
PDS_LIC Failed to get PDSPLUS context string SYNARIO PDSPath ENV
PDSPath SYNARIO PDSPLUS ENV PDS_SYNDPM_ENV PDSPLUS syndpm.log wt
PDS_SYNDPM_LOG=1 c:\tmp\syndpm.log PDS_STDIO_DEBUG=1
c:\tmp\syndpm.sio PDS_SYNDPM_HEARTMSG=1 c:\tmp\syndpm.hbt
PDS_SYNDPM_ENV=1 c:\tmp\syndpm.env PDS_SYNDPM_ARGS=1
c:\tmp\syndpm.arg PDS_SYNDPM_DIOMSG=1 c:\tmp\syndpm.msg
PDS_SYNDPM_DEBUG=1 c:\tmp\syndpm.dbg PDS_SYNDPM_LOG SYNDPM
TKOutputProcMsg Data String(%d): '%s' PDS_SYNDPM_DIOMSG Syndpm
Terminate msg received %d OWNER_PROCESS CREATE COM WINDOW %s:
Failed to Create Application's COM window.
STDIO PROC %d laStdioCommClass

Hmmm, sounds like this fitter uses the KEY and license scheme of a
certain release Synario, so you will need to have all that correctly
installed and setup.

Maybe with other changes I could find the solution, but I've already
lost too much time: I'll try to use the alternative design flow chain.

If the 'E' version fits, and you have a tool flow for that, sounds like
you are OK.

-jg

 

[David Cooprider]

Your best bet would be to get Lattice to send you a copy of ispDesign
Expert
V8.4 (ispDE V8.4) it will support isp1032-60 and isp1032E-70 devices,
all the older devices. Request a license as well based on your C
drive serial number.
Go to a DOS prompt and type "C:\vol" and send the request to
lic_admin@latticesemi.com along with old Lattice key ID (10 digit
number).

Try Lattice Tech Support. techsupport@latticesemi.com
They should be able to help.

The spawning problem I ran into a few years ago. If I remember
correctly
the pdsplus environment variable had spaces after the last character:
pdsplus=C:\pdsplus\bin (do not have any spaces after the n in bin)
this was in a really old version of the software V5.0 or older.

Also no spaces where you install the software and no spaces in file
names
or directory names.

If you can get the ispDE V8.4 to get to the older devices you will
need to
get that info from Lattice. Just let them know what you need.
Hope this helps.

--Coop


Jim Granville <no.spam@designtools.co.nz> wrote in message news:<4R%oc.1958$FN.211542@news02.tsnz.net>...

Fabio G. wrote:
snip
I looked in SYNDPM.exe with an HEX file viewer.
I found some messages:

LatticeStdioWinID LatticeAppQuit LatticeAppStart suspend continue
terminate beat SYNDPM EXIT MESSAGE Syndpm Exiting %d
PDS_SYNDPM_DEBUG SYNDPM DEBUG MESSAGE SYNDPM CLOSING APPLICATION
SynDPM Closing Application %d, imm:%d SYNDPM abel_yield ended
SYNDPM MESSAGE Syndpm break received %d %s SYNDPM abel_yield
started Sent Heart Beat to Synario environment SYNDPM To Synario
PDS_SYNDPM_HEARTMSG %s: Child process (%d) exited with status:%d.
Wait Child *** Process is gone?...
Child process ID = %d, is active.
PDS_SYNDPM_CHILDPROC %s: Wait Child *** received child %d quit
with status %d
%s: Wait Child *** received child %d started.
No response from LSC Compiler...
Click cancel to abort returning from spawnvp.
%s: Using Current Child Id (%d) instead of handle.
%s: Child Proc %s ID -- %d
Request to close syndpm received. Syndpm exiting with status %d
%s
%s
****HERE ******** Received process exit status -1 Possible system
problem to spawn child process PDS_DPM_EXE SYNDPM LICENSE ERROR
for the ispDS+ 5.1 compiler.
FlexLM License file must be copied to the above location
License file %s not found.
Application Registered SYNDPM DEBUG ispDS+ rt PDS_SYNDPM_ARGS
LATTICE_CONSOLE_ID=%u %s/bin/dpm.exe Environment Variable PDSPLUS
is undefined. PDSPLUS=d:\pdsplus PDSPLUS=%s
PATH=%s
PATH=%s\bin;%s; PATH Cannot open current context SYNDPM CONTEXT
Env License File Set License File
LM_LICENSE_FILE=%s\license\license.dat PDS_LIC=%s PDSPLUS=%s
LM_LICENSE_FILE=%s FOUND LM_LICENSE_FILE LM_LICENSE_FILE PDSLic
PDS_LIC Failed to get PDSPLUS context string SYNARIO PDSPath ENV
PDSPath SYNARIO PDSPLUS ENV PDS_SYNDPM_ENV PDSPLUS syndpm.log wt
PDS_SYNDPM_LOG=1 c:\tmp\syndpm.log PDS_STDIO_DEBUG=1
c:\tmp\syndpm.sio PDS_SYNDPM_HEARTMSG=1 c:\tmp\syndpm.hbt
PDS_SYNDPM_ENV=1 c:\tmp\syndpm.env PDS_SYNDPM_ARGS=1
c:\tmp\syndpm.arg PDS_SYNDPM_DIOMSG=1 c:\tmp\syndpm.msg
PDS_SYNDPM_DEBUG=1 c:\tmp\syndpm.dbg PDS_SYNDPM_LOG SYNDPM
TKOutputProcMsg Data String(%d): '%s' PDS_SYNDPM_DIOMSG Syndpm
Terminate msg received %d OWNER_PROCESS CREATE COM WINDOW %s:
Failed to Create Application's COM window.
STDIO PROC %d laStdioCommClass

Hmmm, sounds like this fitter uses the KEY and license scheme of a
certain release Synario, so you will need to have all that correctly
installed and setup.

Maybe with other changes I could find the solution, but I've already
lost too much time: I'll try to use the alternative design flow chain.

If the 'E' version fits, and you have a tool flow for that, sounds like
you are OK.

-jg

 

[Fabio G.]

coop62194@yahoo.com (David Cooprider) wrote:

get that info from Lattice. Just let them know what you need.
Hope this helps.

Sure it helps!
I do want to thank you and the other people who are helping me to solve
my problems with the software.
Before writing here I did not expect I could receive so much useful
feedback ;-)

Just give me some time to apply your suggestions. I will let you know
about news.

Thank you again,
Fabio

PS: I also received your email. I will reply to the other questions
soon.

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