Looking for positive/negative mosfet driver circuit

Anders · Oct 20, 2004

I have an application with an IRF640/IRF9640 N/P channel mosfet pair.

Both sources are ground referenced and the gates are connected together and
I want to drive the gate connection positive and negative so one device or
the other is turned on/off at high speed.

The operating frequency is 100KHz but I need fast switching

I also need the ability to ground the drive, both mosfets off.

It's the sort of thing a CMOS (40244) tristate buffer could do but the
output voltage and drive capabilities aren't sufficient.

Any ideas would be appreciated.

Thanks

Anders

John Smith · Oct 20, 2004

"Anders" <Anders.@invalid.invalid> wrote in message
news:gGydd.193$Za.98@newsfe5-gui.ntli.net...

I have an application with an IRF640/IRF9640 N/P channel mosfet pair.

Both sources are ground referenced and the gates are connected together
and
I want to drive the gate connection positive and negative so one device or
the other is turned on/off at high speed.

The operating frequency is 100KHz but I need fast switching

I also need the ability to ground the drive, both mosfets off.

It's the sort of thing a CMOS (40244) tristate buffer could do but the
output voltage and drive capabilities aren't sufficient.

Any ideas would be appreciated.

Thanks

Anders

Take a look at National's LM5110.

John

Joerg · Oct 20, 2004

Hi Anders,

Another category to check out would be motor controllers. Many of these
also have "dead time control" to avoid the brief instant where both FETs
conduct. You might even be able to use a switch mode controller for this
purpose.

Regards, Joerg

http://www.analogconsultants.com

Anders · Oct 21, 2004

"Joerg" <notthisjoergsch@removethispacbell.net> wrote in message
news:T4Add.8193$6q2.3561@newssvr14.news.prodigy.com...
| Hi Anders,
|
| Another category to check out would be motor controllers. Many of these
| also have "dead time control" to avoid the brief instant where both FETs
| conduct. You might even be able to use a switch mode controller for this
| purpose.
|
| Regards, Joerg
|
| http://www.analogconsultants.com

Thanks for the reply.

My problem is that I need positive and negative drive referenced to ground.
There is no problem with cross conduction due to the way the mosfets are
connected. Oh, the input has to be a PWM signal. I can do the PWM, its just
getting the drive right, 100KHz with fast rise and fall times (high
current).

VDD
|
||-+
||<-
-||-+
| |
| |
IN---- ------GND
| |
| |
-||-+
||->
||-+
|
VSS

Anders

Winfield Hill · Oct 21, 2004

Anders wrote...

I'll look harder at the data sheet but the negative enhancement
is limited to -5V wrt control and there isn't the ability to
ground the output, switch both devices off.

What are you working on?

If the load is floating, you can use standard H-bridge tricks,
OFF, ON in either direction, or SHORT (your ground equivalent)
with both of the LO-side (or HI-side) devices on together. A
classic H-bridge driver IC like the HIP4081A will do the job.

If your load is grounded, you can use a level shifting circuit
to drive one of the many half-bridge FET driver ICs available
(with the IC ground at Vss), but you'll need an additional bi-
directional FET switch circuit (back-to-back FETs with floating
drive, opto, transformer, etc., depending on speed requirement)
for the shorted-to-ground output condition.

--
Thanks,
- Win

(email: use hill_at_rowland-dotties-org for now)

Anders · Oct 21, 2004

"Winfield Hill" <Winfield_member@newsguy.com> wrote in message
news:cl86nl02c94@drn.newsguy.com...
| Anders wrote...
| >
| > I'll look harder at the data sheet but the negative enhancement
| > is limited to -5V wrt control and there isn't the ability to
| > ground the output, switch both devices off.
|
| What are you working on?
|
| If the load is floating, you can use standard H-bridge tricks,
| OFF, ON in either direction, or SHORT (your ground equivalent)
| with both of the LO-side (or HI-side) devices on together. A
| classic H-bridge driver IC like the HIP4081A will do the job.
|
| If your load is grounded, you can use a level shifting circuit
| to drive one of the many half-bridge FET driver ICs available
| (with the IC ground at Vss), but you'll need an additional bi-
| directional FET switch circuit (back-to-back FETs with floating
| drive, opto, transformer, etc., depending on speed requirement)
| for the shorted-to-ground output condition.
|
|
| --
| Thanks,
| - Win
|
| (email: use hill_at_rowland-dotties-org for now)

This is the way my mosfets are connected.

VDD
|
||-+
||<-
-||-+
| |
| |
IN---- ------GND
| |
| |
-||-+
||->
||-+
|
VSS

It is being used in an amplifier based on this patent

http://l2.espacenet.com/espacenet/viewer?PN=GB2386011&CY=gb&LG=en&DB=EPD

Figure 8) shows the desired configuration.

I need to be able to drive the IN terminal, perhaps +/- 10V to enhance one
mosfet or the other. You will see that cross-conduction is not an issue. I
also need the ability to to ground the IN terminal or otherwise remove drive
so both mosfets are off for fault conditions.

Thanks

Anders

Fred Bloggs · Oct 21, 2004

Winfield Hill wrote:

Anders wrote...

This is the way my mosfets are connected.

VDD
|
||-+
||<-
-||-+
| |
| |
IN---- ------GND
| |
| |
-||-+
||-
||-+
|
VSS

It is being used in an amplifier based on this patent
http://l2.espacenet.com/espacenet/viewer?PN=GB2386011&CY=gb&LG=en&DB=EPD
Figure 8) shows the desired configuration.

I need to be able to drive the IN terminal, perhaps +/- 10V to enhance one
mosfet or the other. You will see that cross-conduction is not an issue.

To the contrary, it's a huge issue, especially with that kind of drive.
Both FETs are on simultaneously for a while during every transition.

I also need the ability to ground the IN terminal or otherwise remove
drive so both mosfets are off for fault conditions.

Grounding the IN terminal will turn on both FETs at once, making a power
supply short, very bad. Basically this configuration is a non-starter.

Do you _not_ need to ground the outputs at any time?

Hehe- that is not the complementary buffer- p-channel is the pulldown-
so IN=0V does in fact turn both FETs off and there is no shoot through-
inductance in series with both drains- sources tied together- dead zone
of 2xVgs,th. See
http://l2.espacenet.com/espacenet/bnsviewer?CY=gb&LG=en&DB=EPD&PN=GB2386011&ID=GB+++2386011A++I+
Bet you'll never guess who Keith A. Mallen is? - a pretty smart guy...

Fred Bloggs · Oct 21, 2004

Anders wrote:

This is the way my mosfets are connected.

VDD
|
||-+
||<-
-||-+
| |
| |
IN---- ------GND
| |
| |
-||-+
||-
||-+
|
VSS

Split the gate drive into two- use two cheap MOSFET gate drivers, see
http://www.irf.com - level shift a two input TTL/CMOS drive into the
gate drivers.

Anders · Oct 21, 2004

"Fred Bloggs" <nospam@nospam.com> wrote in message
news:4177B891.80208@nospam.com...
|
|
| Winfield Hill wrote:
| > Anders wrote...
| >
| >>This is the way my mosfets are connected.
| >>
| >> VDD
| >> |
| >> ||-+
| >> ||<-
| >> -||-+
| >> | |
| >> | |
| >> IN---- ------GND
| >> | |
| >> | |
| >> -||-+
| >> ||->
| >> ||-+
| >> |
| >> VSS
| >>
| >>It is being used in an amplifier based on this patent
| >>http://l2.espacenet.com/espacenet/viewer?PN=GB2386011&CY=gb&LG=en&DB=EPD
| >>Figure 8) shows the desired configuration.
| >>
| >>I need to be able to drive the IN terminal, perhaps +/- 10V to enhance
one
| >>mosfet or the other. You will see that cross-conduction is not an issue.
| >
| >
| > To the contrary, it's a huge issue, especially with that kind of drive.
| > Both FETs are on simultaneously for a while during every transition.
| >
| >
| >>I also need the ability to ground the IN terminal or otherwise remove
| >>drive so both mosfets are off for fault conditions.
| >
| >
| > Grounding the IN terminal will turn on both FETs at once, making a
power
| > supply short, very bad. Basically this configuration is a non-starter.
| >
| > Do you _not_ need to ground the outputs at any time?
| >
| >
|
| Hehe- that is not the complementary buffer- p-channel is the pulldown-
| so IN=0V does in fact turn both FETs off and there is no shoot through-
| inductance in series with both drains- sources tied together- dead zone
| of 2xVgs,th. See
|
http://l2.espacenet.com/espacenet/bnsviewer?CY=gb&LG=en&DB=EPD&PN=GB2386011&
ID=GB+++2386011A++I+
| Bet you'll never guess who Keith A. Mallen is? - a pretty smart guy...

|

Yes, I think Mr Hill has misunderstood the configuration.

Thank you for the other link, it gives the patent in its original format and
more information. I had to add the + sign to the link. How did you find
this?, it will help me in my searches.

I also now have his address so I might contact him directly

Thanks

Anders

Fred Bartoli · Oct 21, 2004

"Anders" <Anders.@invalid.invalid> a écrit dans le message de
news:NMRdd.463$oI6.433@newsfe6-gui.ntli.net...

"Fred Bloggs" <nospam@nospam.com> wrote in message
news:4177CAF5.3010908@nospam.com...
|
|
| Anders wrote:
|
|
| > This is the way my mosfets are connected.
|
| > VDD
| > |
| > ||-+
| > ||<-
| > -||-+
| > | |
| > | |
| > IN---- ------GND
| > | |
| > | |
| > -||-+
| > ||-
| > ||-+
| > |
| > VSS
|
|
|
| Split the gate drive into two- use two cheap MOSFET gate drivers, see
| http://www.irf.com - level shift a two input TTL/CMOS drive into the
| gate drivers.
|

Thank you.

It is something that I have considered but the idea is to avoid having to
level shift signals and the method would introduce uncertainty due to gate
delay times and therefore cross-conduction may become a problem again.

I have found

http://www.ixys.net/98807.pdf

and I think there are others.

Which I might operate off split supplies but would have to level shift my
PWM drive. The comparators I have found don't suit negative shifting. I
could do it perhaps with a common base stage but I am uncertain about the
different delays.

I was hoping for a simpler solution.

.----------------------------.
| |
| |
| +-----+---------|--------+---o +20V
| | | | |
| .-. | | |
| | | | | |
| 10K | | | | |
| '-' | | | |
| | |> | .-. |
| +---| | | |220K ||-+
| | |\ | | | ||<-
| | | | '-' .-----||-+
| --- | | | 22n | |
| 100p --- | | | | 220K |
| ___ | | | | || | ___ |
| -|___|----+ +---------|--------+--||---+--|___|-+------.
| 1K | | | | || | | |
| | | | | | | ===
| 100p --- | | | | | GND
| --- | | | +-----||-+
| | | | .-. | ||->
| | |/ | | | z ||-+
| +---| | | |220K A 12V |
| | |< | '-' | |
| .-. | | | |
| | | | | | V 12V
| 10K | | | | | z
| '-' | | | |
| | | | | |
| === === | === ===
| GND GND | GND GND
| |
| |
'----------------------------'
Or use your IXIS driver or whatever you like in the box.

(created by AACircuit v1.28 beta 10/06/04 www.tech-chat.de)

You might want to check start and stop / start conditions.

--
Thanks,
Fred.

Anders · Oct 21, 2004

"Fred Bartoli"
<fred._canxxxel_this_bartoli@RemoveThatAlso_free.fr_AndThisToo> wrote in
message news:4177eee2$0$20573$636a15ce@news.free.fr...
|
| "Anders" <Anders.@invalid.invalid> a écrit dans le message de
| news:NMRdd.463$oI6.433@newsfe6-gui.ntli.net...
| >
| > "Fred Bloggs" <nospam@nospam.com> wrote in message
| > news:4177CAF5.3010908@nospam.com...
| > |
| > |
| > | Anders wrote:
| > |
| > | >
| > | > This is the way my mosfets are connected.
| > | >
| > | > VDD
| > | > |
| > | > ||-+
| > | > ||<-
| > | > -||-+
| > | > | |
| > | > | |
| > | > IN---- ------GND
| > | > | |
| > | > | |
| > | > -||-+
| > | > ||->
| > | > ||-+
| > | > |
| > | > VSS
| > | >
| > |
| > |
| > | Split the gate drive into two- use two cheap MOSFET gate drivers, see
| > | http://www.irf.com - level shift a two input TTL/CMOS drive into the
| > | gate drivers.
| > |
| >
| > Thank you.
| >
| > It is something that I have considered but the idea is to avoid having
to
| > level shift signals and the method would introduce uncertainty due to
gate
| > delay times and therefore cross-conduction may become a problem again.
| >
| > I have found
| >
| > http://www.ixys.net/98807.pdf
| >
| > and I think there are others.
| >
| > Which I might operate off split supplies but would have to level shift
my
| > PWM drive. The comparators I have found don't suit negative shifting. I
| > could do it perhaps with a common base stage but I am uncertain about
the
| > different delays.
| >
| > I was hoping for a simpler solution.
| >
|
|
| .----------------------------.
| | |
| | |
| | +-----+---------|--------+---o +20V
| | | | | |
| | .-. | | |
| | | | | | |
| | 10K | | | | |
| | '-' | | | |
| | | |> | .-. |
| | +---| | | |220K ||-+
| | | |\ | | | ||<-
| | | | | '-' .-----||-+
| | --- | | | 22n | |
| | 100p --- | | | | 220K |
| | ___ | | | | || | ___ |
| | -|___|----+ +---------|--------+--||---+--|___|-+------.
| | 1K | | | | || | | |
| | | | | | | | ===
| | 100p --- | | | | | GND
| | --- | | | +-----||-+
| | | | | .-. | ||->
| | | |/ | | | z ||-+
| | +---| | | |220K A 12V |
| | | |< | '-' | |
| | .-. | | | |
| | | | | | | V 12V
| | 10K | | | | | z
| | '-' | | | |
| | | | | | |
| | === === | === ===
| | GND GND | GND GND
| | |
| | |
| '----------------------------'
| Or use your IXIS driver or whatever you like in the box.
|
| (created by AACircuit v1.28 beta 10/06/04 www.tech-chat.de)
|
| You might want to check start and stop / start conditions.
|
|
| --
| Thanks,
| Fred.
|
|

Thanks

I'll have to look at this harder

I've thought about capacitative coupling but I've always been bothered about
DC restoration.

Sorry I didn't mention it earlier but I have said I am dealing with a PWM
signal as the input.

The zener diodes might improve things but I think there may still be a
problem.

Anders

Anders · Oct 21, 2004

"Joerg" <notthisjoergsch@removethispacbell.net> wrote in message
news

rSdd.33250$QJ3.14345@newssvr21.news.prodigy.com...
| Hello Anders,
|
| >| > VDD
| >| > |
| >| > ||-+
| >| > ||<-
| >| > -||-+
| >| > | |
| >| > | |
| >| > IN---- ------GND
| >| > | |
| >| > | |
| >| > -||-+
| >| > ||->
| >| > ||-+
| >| > |
| >| > VSS
| >
| >
| BTW, this looks like a dead short between VDD and GND if the upper FET
| is turned on, same for VSS on the lower FET ;-)
|
| >It is something that I have considered but the idea is to avoid having to
| >level shift signals and the method would introduce uncertainty due to
gate
| >delay times and therefore cross-conduction may become a problem again.
| >
| >
| If you are planning PWM you can also use a toroid or pot core
| transformer to level shift. If you use two you can delay the respective
| turn-on signals versus turn-off to avoid cross conduction. As others
| have also said, cross conduction is an issue. It might generate huge
| current spikes that can mess up your other circuitry and cause EMI. FET
| life can be shortened by it and if the FETs are pretty maxed out it
| could turn them into rockets.
|
| Regards, Joerg
|
| http://www.analogconsultants.com

Thanks

Here is a better link.

http://l2.espacenet.com/espacenet/bnsviewer?CY=gb&LG=en&DB=EPD&PN=GB2386011&
ID=GB+++2386011A++I+

It is the original patent in more detail, you need the + on the end of the
link for it to work.

VDD and VSS are connected via inductors.

If you look at the way the mosfets are connected then you will see that is
not possible. Notice that the upper device is an N-channel mosfet and the
lower device is a P-channel mosfet and they are source connected with the
drive referenced to that connection.

The drive signal is already ground referenced. The annoying thing is that it
has to swing positive and negative.

Fred has suggested capacitative coupling but I am concerned about DC
restoration when using such a method. I think the same will also apply if I
use transformer coupling.

Anders

Joerg · Oct 21, 2004

Hi Anders,

Here is a better link.

http://l2.espacenet.com/espacenet/bnsviewer?CY=gb&LG=en&DB=EPD&PN=GB2386011&
ID=GB+++2386011A++I+

This comes back as "document inaccessible".

Fred has suggested capacitative coupling but I am concerned about DC
restoration when using such a method. I think the same will also apply if I
use transformer coupling.

With PWM you may not need DC restoration after a transformer unless the

on-time of a FET is much longer than the off-time because you might
exceed the gate breakdown voltage in that case. Short on times are easy,
even 50-50 should be no problem.

Regards, Joerg

http://www.analogconsultants.com

Anders · Oct 20, 2004

"John Smith" <kd5yikes@mindspring.com> wrote in message
news:ktzdd.2430$%h1.1492@newsread3.news.pas.earthlink.net...
|
| "Anders" <Anders.@invalid.invalid> wrote in message
| news:gGydd.193$Za.98@newsfe5-gui.ntli.net...
| >I have an application with an IRF640/IRF9640 N/P channel mosfet pair.
| >
| > Both sources are ground referenced and the gates are connected together
| > and
| > I want to drive the gate connection positive and negative so one device
or
| > the other is turned on/off at high speed.
| >
| > The operating frequency is 100KHz but I need fast switching
| >
| > I also need the ability to ground the drive, both mosfets off.
| >
| > It's the sort of thing a CMOS (40244) tristate buffer could do but the
| > output voltage and drive capabilities aren't sufficient.
| >
| > Any ideas would be appreciated.
| >
| > Thanks
| >
| > Anders
|
|
|
|
| Take a look at National's LM5110.
|
| John
|
|

Thanks for the reply.

I'll look harder at the data sheet but the negative enhancement is limited
to -5V wrt control and there isn't the ability to ground the output, switch
both devices off.

Sorry

Anders

Anders · Oct 21, 2004

"Winfield Hill" <Winfield_member@newsguy.com> wrote in message
news:cl8b6l02q2c@drn.newsguy.com...
| Anders wrote...
| >
| >This is the way my mosfets are connected.
| >
| > VDD
| > |
| > ||-+
| > ||<-
| > -||-+
| > | |
| > | |
| > IN---- ------GND
| > | |
| > | |
| > -||-+
| > ||->
| > ||-+
| > |
| > VSS
| >
| > It is being used in an amplifier based on this patent
| > http://l2.espacenet.com/espacenet/viewer?PN=GB2386011&CY=gb&LG=en&DB=EPD
| > Figure 8) shows the desired configuration.
| >
| > I need to be able to drive the IN terminal, perhaps +/- 10V to enhance
one
| > mosfet or the other. You will see that cross-conduction is not an issue.
|
| To the contrary, it's a huge issue, especially with that kind of drive.
| Both FETs are on simultaneously for a while during every transition.
|
| > I also need the ability to ground the IN terminal or otherwise remove
| > drive so both mosfets are off for fault conditions.
|
| Grounding the IN terminal will turn on both FETs at once, making a power
| supply short, very bad. Basically this configuration is a non-starter.
|
| Do you _not_ need to ground the outputs at any time?
|
|
| --
| Thanks,
| - Win
|
| (email: use hill_at_rowland-dotties-org for now)

The upper mosfet is an N-channel device and the lower mosfet is a P-channel
device. VDD and VSS are higher voltages than the drive signal will be.

Anders

Anders · Oct 21, 2004

"Fred Bloggs" <nospam@nospam.com> wrote in message
news:4177CAF5.3010908@nospam.com...
|
|
| Anders wrote:
|
| >
| > This is the way my mosfets are connected.
| >
| > VDD
| > |
| > ||-+
| > ||<-
| > -||-+
| > | |
| > | |
| > IN---- ------GND
| > | |
| > | |
| > -||-+
| > ||->
| > ||-+
| > |
| > VSS
| >
|
|
| Split the gate drive into two- use two cheap MOSFET gate drivers, see
| http://www.irf.com - level shift a two input TTL/CMOS drive into the
| gate drivers.
|

Thank you.

It is something that I have considered but the idea is to avoid having to
level shift signals and the method would introduce uncertainty due to gate
delay times and therefore cross-conduction may become a problem again.

I have found

http://www.ixys.net/98807.pdf

and I think there are others.

Which I might operate off split supplies but would have to level shift my
PWM drive. The comparators I have found don't suit negative shifting. I
could do it perhaps with a common base stage but I am uncertain about the
different delays.

I was hoping for a simpler solution.

Anders

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