LogiCORE PCI-X question

N

Nahum Barnea

Guest
Hi.

1. After configuration of BAR's, is there a way for the user
application code (inside the fpga) to get the BAR's exact value?

2. Is there a way to set the BAR's values internally – i.e without a
PCI-X configuration cycles ?

3. I would like to use the PCI-X core prior to the host configuration.
I.e after appropriate reset phase, I would like to assert M_REQ of the
core and then I expect the core to assert REQ_O. Is this possible?


ThankX,
NAHUM
 
So you're saying you want to initiate a data transfer between the time the
system reboots and the BIOS assignes BAR values? For one, that's a little
scarry, and for two, the system bus isn't going to be available during that
time (where are you going to get/send data with no other devices on the
bus?), and for three, I would doubt it is possible. If you need to do a data
transfer at that time use some other medium from your board than the PCI-X
bus. I believe if you use ports instead of memory registers you can set
their exact values. You could pass in the memory registers' addresses when
the driver initializes. Give some more detail for your app and we could get
you some better suggestions.

"Nahum Barnea" <nahum_barnea@yahoo.com> wrote in message
news:fc23bdfc.0310290156.73759b42@posting.google.com...
Hi.

1. After configuration of BAR's, is there a way for the user
application code (inside the fpga) to get the BAR's exact value?

2. Is there a way to set the BAR's values internally - i.e without a
PCI-X configuration cycles ?

3. I would like to use the PCI-X core prior to the host configuration.
I.e after appropriate reset phase, I would like to assert M_REQ of the
core and then I expect the core to assert REQ_O. Is this possible?


ThankX,
NAHUM
 
Hello,

1. After configuration of BAR's, is there a way for the user
application code (inside the fpga) to get the BAR's exact value?
No. Unless you are doing something, well... unusual, your user
application should not care about its absolute address -- only
that it is being accessed. The LogiCORE PCI-X interface lets
you know you are being accessed, but does not let you see your
absolute address.

2. Is there a way to set the BAR's values internally – i.e
without a PCI-X configuration cycles ?
In general, no. However, if you read the chapter in the design
guide about setting core options, you will see there's limited
support for this involving BAR0 and BAR1.

3. I would like to use the PCI-X core prior to the host
configuration. I.e after appropriate reset phase, I would
like to assert M_REQ of the core and then I expect the core
to assert REQ_O. Is this possible?
In that same chapter of the design guide, there is a section
about initiator options. You can set an option that will allow
you to initiate transfers even before the busmaster is enabled.

Someone else wrote:
So you're saying you want to initiate a data transfer between
the time the system reboots and the BIOS assignes BAR values?
For one, that's a little scarry, and for two, the system bus
isn't going to be available during that time (where are you
going to get/send data with no other devices on the bus?)
I would carefully consider what this person wrote, and make
sure you aren't trying to do something that will result in a
system failure.

Eric
 

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