K
kris
Guest
Does someone know of a tool that finds the combinatorial logic that is
affected by a set of registers and input
ports?
In the EDA community they call this a logic cone (Logic cones are groups
of logic bordered by registers, ports or black boxes.) It is a.o. used in
verification tools.
In my case I do not want to compare two design as in a logic equivalence
check. I would simply like a netlist of cells.
Kris
affected by a set of registers and input
ports?
In the EDA community they call this a logic cone (Logic cones are groups
of logic bordered by registers, ports or black boxes.) It is a.o. used in
verification tools.
In my case I do not want to compare two design as in a logic equivalence
check. I would simply like a netlist of cells.
Kris