log_2 command in vhdl?

[Carson]

Hi,

Is there a command log_2 in vhdl?

For example, would be nice that by specifying the depth of the
memory module, it can figure out the required bit-width for the address
lines.

Thanks,

Carson

 

[Egbert Molenkamp]

There is no log2 function. In a similar situation I use the following
function.
Notice that the 'while loop' is more convenient but I know from at least one
synthesis tool that it does not support the while, therefor for loop is
used.
In the latter solution you must know the upper bound, e.g. 10 in thsi
example (for i in 0 to 10).

Egbert Molenkamp

function log2 (N : positive) return positive is -- N should be power of
two.
variable tmp, i_res : integer;
begin
tmp:=1 ; i_res:=0;
-- while tmp < N loop
-- tmp := tmp*2;
-- i:=i+1;
-- end loop;
for i in 0 to 10 loop
if tmp<N then
tmp:=tmp*2;
else
i_res:=i;
exit;
end if;
end loop;

assert 2**i_res=N report "N is not a power of 2" severity note;
return i_res;
end log2;


"Carson" <ckpun1978@gmail.com> wrote in message
news:1128468668.610241.33010@g44g2000cwa.googlegroups.com...

Hi,

Is there a command log_2 in vhdl?

For example, would be nice that by specifying the depth of the
memory module, it can figure out the required bit-width for the address
lines.

Thanks,

Carson

 

[Olaf Petzold]

Carson schrieb:

Hi,

Is there a command log_2 in vhdl?

For example, would be nice that by specifying the depth of the
memory module, it can figure out the required bit-width for the address
lines.

Thanks,

Carson

Hi, here is my approach used for an generic mux. Rename the package
name maybe to math e.g.

library ieee;
use ieee.std_logic_1164.all;

package mux_g_pkg is
function log2_f(n : integer) return integer;
end package;

package body mux_g_pkg is

-- very simple log2 function
function log2_f(n : in integer) return integer is
variable i : integer := 0;
begin
while (2**i <= n) loop
i := i + 1;
end loop;
return i-1;
end log2_f;

end mux_g_pkg;

Regards,
Olaf

 

[David Bishop]

Carson wrote:

Hi,

Is there a command log_2 in vhdl?

For example, would be nice that by specifying the depth of the
memory module, it can figure out the required bit-width for the address
lines.

Here's a very simple way to do this:

function find_msb (arg : UNSIGNED; y : STD_ULOGIC) return INTEGER is
begin
for_loop : for i in arg'high downto arg'low loop
if arg(i) = y then
return i;
end if;
end loop;
return arg'low-1; -- return out of bounds 'low
end function find_msb;

xyz := find_msb ( Mem_size, '1');

The result "xyz" will be a very rough ln2(Mem_size).

(find_msb will be a built in function in the vhdl-2006 release)