Library compiler without a license?

  • Thread starter Kelvin Tsai @ Singapore
  • Start date
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Kelvin Tsai @ Singapore

Guest
I generated some RAM models in .lib format then converted them into
..db. However, I have library compiler here, .db files were generated
with a warning "The LIbrary OCmpiler is not enabled, The cell
functionality is ignored." With such a RAM model, is the timing
information in the .db or just an empty box with?

When I 'report_lib RAMMDL", the report has one line called "Timing
Range: No timing range specified"...Does this indicate the timing
information isnt inn the lib?

Following is the timing I am interested to see in the .db, which will
enable DC to satisfy the timing...

Best Regards,
Kelvin






-----------------------
bus(QB) {
bus_type : XRAM128X20_DATA;
direction : output;
max_capacitance : 1.300;
memory_read() {
address : AB;
}
timing() {
related_pin : "CLKB" ;
timing_type : rising_edge;
timing_sense : non_unate;
cell_rise(XRAM128X20_delay_template) {
index_1 ("0.010, 0.100, 0.200, 0.400, 0.800, 1.600, 2.500");
index_2 ("0.000, 0.030, 0.060, 0.130, 0.260, 0.520, 1.300");
values ( \
"0.784, 0.804, 0.825, 0.872, 0.961, 1.139, 1.672", \
"0.771, 0.792, 0.812, 0.860, 0.949, 1.127, 1.660", \
"0.757, 0.778, 0.798, 0.846, 0.935, 1.113, 1.646", \
"0.729, 0.750, 0.770, 0.818, 0.907, 1.085, 1.618", \
"0.674, 0.694, 0.715, 0.763, 0.852, 1.029, 1.563", \
"0.563, 0.583, 0.604, 0.652, 0.740, 0.918, 1.451", \
"0.438, 0.458, 0.479, 0.526, 0.615, 0.793, 1.326" \
)
}
rise_transition(XRAM128X20_load_template) {
index_1 ("0.000, 0.030, 0.060, 0.130, 0.260, 0.520, 1.300");
values ("0.055, 0.105, 0.155, 0.272, 0.489, 0.923, 2.224")
}
cell_fall(XRAM128X20_delay_template) {
index_1 ("0.010, 0.100, 0.200, 0.400, 0.800, 1.600, 2.500");
index_2 ("0.000, 0.030, 0.060, 0.130, 0.260, 0.520, 1.300");
values ( \
"0.784, 0.804, 0.825, 0.872, 0.961, 1.139, 1.672", \
"0.771, 0.792, 0.812, 0.860, 0.949, 1.127, 1.660", \
"0.757, 0.778, 0.798, 0.846, 0.935, 1.113, 1.646", \
"0.729, 0.750, 0.770, 0.818, 0.907, 1.085, 1.618", \
"0.674, 0.694, 0.715, 0.763, 0.852, 1.029, 1.563", \
"0.563, 0.583, 0.604, 0.652, 0.740, 0.918, 1.451", \
"0.438, 0.458, 0.479, 0.526, 0.615, 0.793, 1.326" \
)
}
fall_transition(XRAM128X20_load_template) {
index_1 ("0.000, 0.030, 0.060, 0.130, 0.260, 0.520, 1.300");
values ("0.041, 0.078, 0.114, 0.199, 0.357, 0.673, 1.622")
} }
}
 
1. I assume you've used write_lib command to generate .db files. This
is OK because write_lib doesn't require library compiler license and
generates valid black-box timing macro for given cell. Black-box also
means that logical functionality of this cell is ignored, but it is
still OK for PrimeTime.
2. It seems like the problem you've described has another origin. Once
you use *_delay_template pointers (for example, for cell_rise or
delay_transition) you must have all these templates within each .lib
module you are compiling. Make shure you have proper library { }
section with all timing templates like "XRAM128X20_delay_template"
defined inside it.

Regards,
Alexander Gnusin
www.TCLforEDA.net



If the Library Compiler license is
missing, the library is still read in, but all the functional
information
is removed. As a result, all the cells in the .lib file are treated as
black
boxes, and any optimization in this library is disabled in Design
Compiler.
This is OK because the .lib file contains a black-box description of
the IP.
After you write out a .db file with the relevant timing information
for the
IP, the file can be used when you perform static timing analysis in
PrimeTime.

kelvin_xq@hotmail.com (Kelvin Tsai @ Singapore) wrote in message news:<bf7e7c6.0309080150.637ff58@posting.google.com>...
I generated some RAM models in .lib format then converted them into
.db. However, I have library compiler here, .db files were generated
with a warning "The LIbrary OCmpiler is not enabled, The cell
functionality is ignored." With such a RAM model, is the timing
information in the .db or just an empty box with?

When I 'report_lib RAMMDL", the report has one line called "Timing
Range: No timing range specified"...Does this indicate the timing
information isnt inn the lib?

Following is the timing I am interested to see in the .db, which will
enable DC to satisfy the timing...

Best Regards,
Kelvin






-----------------------
bus(QB) {
bus_type : XRAM128X20_DATA;
direction : output;
max_capacitance : 1.300;
memory_read() {
address : AB;
}
timing() {
related_pin : "CLKB" ;
timing_type : rising_edge;
timing_sense : non_unate;
cell_rise(XRAM128X20_delay_template) {
index_1 ("0.010, 0.100, 0.200, 0.400, 0.800, 1.600, 2.500");
index_2 ("0.000, 0.030, 0.060, 0.130, 0.260, 0.520, 1.300");
values ( \
"0.784, 0.804, 0.825, 0.872, 0.961, 1.139, 1.672", \
"0.771, 0.792, 0.812, 0.860, 0.949, 1.127, 1.660", \
"0.757, 0.778, 0.798, 0.846, 0.935, 1.113, 1.646", \
"0.729, 0.750, 0.770, 0.818, 0.907, 1.085, 1.618", \
"0.674, 0.694, 0.715, 0.763, 0.852, 1.029, 1.563", \
"0.563, 0.583, 0.604, 0.652, 0.740, 0.918, 1.451", \
"0.438, 0.458, 0.479, 0.526, 0.615, 0.793, 1.326" \
)
}
rise_transition(XRAM128X20_load_template) {
index_1 ("0.000, 0.030, 0.060, 0.130, 0.260, 0.520, 1.300");
values ("0.055, 0.105, 0.155, 0.272, 0.489, 0.923, 2.224")
}
cell_fall(XRAM128X20_delay_template) {
index_1 ("0.010, 0.100, 0.200, 0.400, 0.800, 1.600, 2.500");
index_2 ("0.000, 0.030, 0.060, 0.130, 0.260, 0.520, 1.300");
values ( \
"0.784, 0.804, 0.825, 0.872, 0.961, 1.139, 1.672", \
"0.771, 0.792, 0.812, 0.860, 0.949, 1.127, 1.660", \
"0.757, 0.778, 0.798, 0.846, 0.935, 1.113, 1.646", \
"0.729, 0.750, 0.770, 0.818, 0.907, 1.085, 1.618", \
"0.674, 0.694, 0.715, 0.763, 0.852, 1.029, 1.563", \
"0.563, 0.583, 0.604, 0.652, 0.740, 0.918, 1.451", \
"0.438, 0.458, 0.479, 0.526, 0.615, 0.793, 1.326" \
)
}
fall_transition(XRAM128X20_load_template) {
index_1 ("0.000, 0.030, 0.060, 0.130, 0.260, 0.520, 1.300");
values ("0.041, 0.078, 0.114, 0.199, 0.357, 0.673, 1.622")
} }
}
 
Hi, Alex:

Thanks for your reply.
The .lib file is the only synopsys file I can get from a Ram-Generator
supplied by the Fab. I can also
get a datasheet for the RAMs I generate. I may read in this .lib with
read_lib into design compiler but
cant do much further than that.
Probably I need to convert this .lib into .db so that I can synthesize my
design.

Could you teach me the following:
What is the right procedure to synthesize a design with a RAM when I don't
have a .db model for the
RAM? I only have the datasheet and .lib file generated from a RAM-Generator
supplied by the fab.

Best Regards,
Kelvin








"Alexander Gnusin" <alexg@ottawa.com> wrote in message
news:a504dc86.0309080821.4c97e8f0@posting.google.com...
1. I assume you've used write_lib command to generate .db files. This
is OK because write_lib doesn't require library compiler license and
generates valid black-box timing macro for given cell. Black-box also
means that logical functionality of this cell is ignored, but it is
still OK for PrimeTime.
2. It seems like the problem you've described has another origin. Once
you use *_delay_template pointers (for example, for cell_rise or
delay_transition) you must have all these templates within each .lib
module you are compiling. Make shure you have proper library { }
section with all timing templates like "XRAM128X20_delay_template"
defined inside it.

Regards,
Alexander Gnusin
www.TCLforEDA.net



If the Library Compiler license is
missing, the library is still read in, but all the functional
information
is removed. As a result, all the cells in the .lib file are treated as
black
boxes, and any optimization in this library is disabled in Design
Compiler.
This is OK because the .lib file contains a black-box description of
the IP.
After you write out a .db file with the relevant timing information
for the
IP, the file can be used when you perform static timing analysis in
PrimeTime.

kelvin_xq@hotmail.com (Kelvin Tsai @ Singapore) wrote in message
news:<bf7e7c6.0309080150.637ff58@posting.google.com>...
I generated some RAM models in .lib format then converted them into
.db. However, I have library compiler here, .db files were generated
with a warning "The LIbrary OCmpiler is not enabled, The cell
functionality is ignored." With such a RAM model, is the timing
information in the .db or just an empty box with?

When I 'report_lib RAMMDL", the report has one line called "Timing
Range: No timing range specified"...Does this indicate the timing
information isnt inn the lib?

Following is the timing I am interested to see in the .db, which will
enable DC to satisfy the timing...

Best Regards,
Kelvin






-----------------------
bus(QB) {
bus_type : XRAM128X20_DATA;
direction : output;
max_capacitance : 1.300;
memory_read() {
address : AB;
}
timing() {
related_pin : "CLKB" ;
timing_type : rising_edge;
timing_sense : non_unate;
cell_rise(XRAM128X20_delay_template) {
index_1 ("0.010, 0.100, 0.200, 0.400, 0.800, 1.600, 2.500");
index_2 ("0.000, 0.030, 0.060, 0.130, 0.260, 0.520, 1.300");
values ( \
"0.784, 0.804, 0.825, 0.872, 0.961, 1.139, 1.672", \
"0.771, 0.792, 0.812, 0.860, 0.949, 1.127, 1.660", \
"0.757, 0.778, 0.798, 0.846, 0.935, 1.113, 1.646", \
"0.729, 0.750, 0.770, 0.818, 0.907, 1.085, 1.618", \
"0.674, 0.694, 0.715, 0.763, 0.852, 1.029, 1.563", \
"0.563, 0.583, 0.604, 0.652, 0.740, 0.918, 1.451", \
"0.438, 0.458, 0.479, 0.526, 0.615, 0.793, 1.326" \
)
}
rise_transition(XRAM128X20_load_template) {
index_1 ("0.000, 0.030, 0.060, 0.130, 0.260, 0.520, 1.300");
values ("0.055, 0.105, 0.155, 0.272, 0.489, 0.923, 2.224")
}
cell_fall(XRAM128X20_delay_template) {
index_1 ("0.010, 0.100, 0.200, 0.400, 0.800, 1.600, 2.500");
index_2 ("0.000, 0.030, 0.060, 0.130, 0.260, 0.520, 1.300");
values ( \
"0.784, 0.804, 0.825, 0.872, 0.961, 1.139, 1.672", \
"0.771, 0.792, 0.812, 0.860, 0.949, 1.127, 1.660", \
"0.757, 0.778, 0.798, 0.846, 0.935, 1.113, 1.646", \
"0.729, 0.750, 0.770, 0.818, 0.907, 1.085, 1.618", \
"0.674, 0.694, 0.715, 0.763, 0.852, 1.029, 1.563", \
"0.563, 0.583, 0.604, 0.652, 0.740, 0.918, 1.451", \
"0.438, 0.458, 0.479, 0.526, 0.615, 0.793, 1.326" \
)
}
fall_transition(XRAM128X20_load_template) {
index_1 ("0.000, 0.030, 0.060, 0.130, 0.260, 0.520, 1.300");
values ("0.041, 0.078, 0.114, 0.199, 0.357, 0.673, 1.622")
} }
}
 

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