library clause

S

Schüle Daniel

Guest
Hello all,

I tried to google for it and search in my book
unfortunately I couldn't find the answer

we have primary design units and secondary in VHDL.
If I use library clause above a primary unit, such as entity
do I then make this library available to all its architectures?

what if I write the same library clause above one of
the architectures, does it make that library available for other
architectures of the same entity?

Of course the same game for package(as primary unit) and
package body(as secondary unit).

Thanks in advance.

Regards, Daniel
 
Schüle Daniel wrote:

we have primary design units and secondary in VHDL.
If I use library clause above a primary unit, such as entity
do I then make this library available to all its architectures?
Yes, If the architectures are in the same file
and if there is an appropriate USE statement.

what if I write the same library clause above one of
the architectures, does it make that library available for other
architectures of the same entity?
No.

-- Mike Treseler
 
Mike Treseler a écrit :

Schüle Daniel wrote:

we have primary design units and secondary in VHDL.
If I use library clause above a primary unit, such as entity
do I then make this library available to all its architectures?

Yes, If the architectures are in the same file
Yes, even if they are not in the same file!

and if there is an appropriate USE statement.
All the context clauses of an entity apply to its architecture.
Cf LRM Chap 10, if you are *very* courageous.

what if I write the same library clause above one of
the architectures, does it make that library available for other
architectures of the same entity?

No.
JD.
 
Just a point of clarification, but the design unit includes the context
_clause_ immediately preceeding the library unit. The _context_ for a
secondary unit includes both its context_clause, and that of its
associated primary unit. (i.e. a package body's context includes that
of its package, and an architecture's context includes that of its
entity.)

Whether or not the primary and secondary units are in the same file is
irrelavant per the language spec, but some tools do not properly handle
that case.

Andy



john Doef wrote:
Mike Treseler a écrit :

Schüle Daniel wrote:

we have primary design units and secondary in VHDL.
If I use library clause above a primary unit, such as entity
do I then make this library available to all its architectures?

Yes, If the architectures are in the same file
Yes, even if they are not in the same file!

and if there is an appropriate USE statement.

All the context clauses of an entity apply to its architecture.
Cf LRM Chap 10, if you are *very* courageous.

what if I write the same library clause above one of
the architectures, does it make that library available for other
architectures of the same entity?

No.

JD.
 
[...]

thx for responses so far
I found out that an entity may also contain shared variable

entity test is
shared variable i: integer;
end;

I suppose that then all processes in all architectures of test
have access to it.

Regards, Daniel
 
Only the one architecture bound to that instance of the entity will
have access to it. For the other architectures to access it, they would
have to be bound to different instances of the entity, and thus would
not see the same shared variable.

Andy


Schüle Daniel wrote:
thx for responses so far
I found out that an entity may also contain shared variable

entity test is
shared variable i: integer;
end;

I suppose that then all processes in all architectures of test
have access to it.

Regards, Daniel
 

Welcome to EDABoard.com

Sponsor

Back
Top