LE and EAB on FPGA board

[Jasmine Hau]

Hi, to all FPGA expoert,

i wish to ask, when I synthesis my VHDL code using QuartusII ,
my logic function will go to FPGA LE logic assignment while the Altera
LPM Memory module such as LPM_RAM_DQ will go to EAB....

if i wish to use the EAB to perform the logic circuit instead
just of memory module, what should i do? Is there any setting or
options that i need to set???

I looking for your reply, thank you very much.

 

[Subroto Datta]

The option you are looking for is AUTO_IMPLEMENT_IN_ROM. It is available
only for certain Device families. The details from the Quartus II online
help are:
A logic option that allows the Compiler to automatically implement
combinational logic in ROM (that is, in an embedded cell within an Embedded
System Block (ESB) or Embedded Array Block (EAB) that is set to use ROM
mode), to improve speed or area usage. Using ROM in this way can free up
logic cells that would otherwise be needed to implement the combinational
logic.

This option is ignored if it is assigned to anything other than a design
entity. The Auto Implement in ROM option is also ignored if you select
Product Term as the setting for the Technology Mapper option. This option
can be set in the Assignment Editor (Assignments menu) or the Analysis &
Synthesis Settings page or the Fitter Settings page of the Settings dialog
box (Assignments menu). This option is available for ACEXŽ 1K, APEXT 20K,
APEX 20KC, APEX 20KE, APEX II, ARMŽ-based ExcaliburT, FLEX 10KŽ, FLEX 10KA,
FLEX 10KE, and MercuryT devices.



Hope this helps.



- Subroto Datta

Altera Corp.