Lattice's ECP5 - half of the program went MIA - WTF ?

[Brane2]

I've noticed that literally over night ordinary ( non-SERDES, non-automotive) members of ECP5 family is gone on Lattice's pages.

Questions:

1. Is there process advancement comming ( 40nm ->28 nm or similar)
2. Are we to see iCE50, MachXO4, ECP6 shortly ?
3. How much of this is caused by process advancement (like 28 nm becoming more cost-effective than 40nm for the purpose etc) ?
4. How much of this is caused by IoT and AI expansion ?
5. HOw much of this is caued by new names and offers ( Effinix, new Chinese names etc) ?

 

[Michael Kellett]

On 29/11/2019 07:56, Brane2 wrote:

I've noticed that literally over night ordinary ( non-SERDES, non-automotive) members of ECP5 family is gone on Lattice's pages.

Questions:

1. Is there process advancement comming ( 40nm ->28 nm or similar)
2. Are we to see iCE50, MachXO4, ECP6 shortly ?
3. How much of this is caused by process advancement (like 28 nm becoming more cost-effective than 40nm for the purpose etc) ?
4. How much of this is caused by IoT and AI expansion ?
5. HOw much of this is caued by new names and offers ( Effinix, new Chinese names etc) ?

Near panic - just about to design in LFE5U-45 in 256pin 0.8mm pitch BGA,

Still on the website today:
under the bold heading "0.8mm Spacing I/O Count/SERDES", 4th - 7th
columns are parts with no serdes and not automotive.

Mouser had stock yesterday.

MK

 

[Rick C]

On Friday, November 29, 2019 at 2:56:19 AM UTC-5, Brane2 wrote:

I've noticed that literally over night ordinary ( non-SERDES, non-automotive) members of ECP5 family is gone on Lattice's pages.

Questions:

1. Is there process advancement comming ( 40nm ->28 nm or similar)
2. Are we to see iCE50, MachXO4, ECP6 shortly ?
3. How much of this is caused by process advancement (like 28 nm becoming more cost-effective than 40nm for the purpose etc) ?
4. How much of this is caused by IoT and AI expansion ?
5. HOw much of this is caued by new names and offers ( Effinix, new Chinese names etc) ?

I would ask what you have been smoking!??? I see parts that are not SERDES and not automotive. They are in the same table as the rest of the ECP5 non-automotive parts, on the right. I guess they are easy to overlook on the right side of the table.

Not sure what an ICE50 would be other than a step backwards. The original devices were the ICE65 made on a 65 nm process which was very quickly replaced with smaller, but more static power hungry ICE40 parts on a 40 nm process. So ICE50 would be reversing course. Maybe ICE28, but who knows?

--

Rick C.

- Get 1,000 miles of free Supercharging
- Tesla referral code - https://ts.la/richard11209

 

[Brane2]

Dne petek, 29. november 2019 15.21.42 UTC je oseba Rick C napisala:

> I would ask what you have been smoking!??? I see parts that are not SERDES and not automotive. They are in the same table as the rest of the ECP5 non-automotive parts, on the right. I guess they are easy to overlook on the right side of the table.

It looks like they've been arearangig those pages. Previous version had each family version in separate table, with its own enclosure combinations.
I've seen new version without updated headers, which was fixed shortly after...


> Not sure what an ICE50 would be other than a step backwards. The original devices were the ICE65 made on a 65 nm process which was very quickly replaced with smaller, but more static power hungry ICE40 parts on a 40 nm process. So ICE50 would be reversing course. Maybe ICE28, but who knows?

I've meant to say next-gen. Didn't know that "40" signifies geometry size.
But while at it, with densities that low, geometry shrink is not always optimal, so who knows, they might do that or stay on 4onm buit use fundamentally different process etc.

 

[Rick C]

On Saturday, November 30, 2019 at 2:26:31 AM UTC-5, Brane2 wrote:

Dne petek, 29. november 2019 15.21.42 UTC je oseba Rick C napisala:

I would ask what you have been smoking!??? I see parts that are not SERDES and not automotive. They are in the same table as the rest of the ECP5 non-automotive parts, on the right. I guess they are easy to overlook on the right side of the table.

It looks like they've been arearangig those pages. Previous version had each family version in separate table, with its own enclosure combinations.
I've seen new version without updated headers, which was fixed shortly after...


Not sure what an ICE50 would be other than a step backwards. The original devices were the ICE65 made on a 65 nm process which was very quickly replaced with smaller, but more static power hungry ICE40 parts on a 40 nm process. So ICE50 would be reversing course. Maybe ICE28, but who knows?

I've meant to say next-gen. Didn't know that "40" signifies geometry size..
But while at it, with densities that low, geometry shrink is not always optimal, so who knows, they might do that or stay on 4onm buit use fundamentally different process etc.

In the old days a shrink would be done on a design that reduced dimensions in the X and Y direction without changing the Z dimension features. This was less work than a full scaling but didn't offer the full benefits (I might have the terms switched). I don't think they do that anymore as the details involved are more complex and since these processes are not at all on the cutting edge, but rather are well established "mature" processes at this point and so it is unlikely they would do anything other than move from one process to the next.

I think there are issues with combining Flash with logic processes and that typically lags the state of the art by several generations. The ICE parts don't have flash, they have RAM and one time programmable PROM.

I believe the ICE parts are not about speed, rather cost, so presently the 40 nm process is "good enough". We will see what the recent competition will do for that.

--

Rick C.

+ Get 1,000 miles of free Supercharging
+ Tesla referral code - https://ts.la/richard11209

 

[Gabor]

On Saturday, 11/30/2019 8:54 AM, Rick C wrote:

On Saturday, November 30, 2019 at 2:26:31 AM UTC-5, Brane2 wrote:
Dne petek, 29. november 2019 15.21.42 UTC je oseba Rick C napisala:

I would ask what you have been smoking!??? I see parts that are not SERDES and not automotive. They are in the same table as the rest of the ECP5 non-automotive parts, on the right. I guess they are easy to overlook on the right side of the table.

It looks like they've been arearangig those pages. Previous version had each family version in separate table, with its own enclosure combinations.
I've seen new version without updated headers, which was fixed shortly after...


Not sure what an ICE50 would be other than a step backwards. The original devices were the ICE65 made on a 65 nm process which was very quickly replaced with smaller, but more static power hungry ICE40 parts on a 40 nm process. So ICE50 would be reversing course. Maybe ICE28, but who knows?

I've meant to say next-gen. Didn't know that "40" signifies geometry size.
But while at it, with densities that low, geometry shrink is not always optimal, so who knows, they might do that or stay on 4onm buit use fundamentally different process etc.

In the old days a shrink would be done on a design that reduced dimensions in the X and Y direction without changing the Z dimension features. This was less work than a full scaling but didn't offer the full benefits (I might have the terms switched). I don't think they do that anymore as the details involved are more complex and since these processes are not at all on the cutting edge, but rather are well established "mature" processes at this point and so it is unlikely they would do anything other than move from one process to the next.

I think there are issues with combining Flash with logic processes and that typically lags the state of the art by several generations. The ICE parts don't have flash, they have RAM and one time programmable PROM.

I believe the ICE parts are not about speed, rather cost, so presently the 40 nm process is "good enough". We will see what the recent competition will do for that.

ICE parts were all about low power, especially ultra-low standby power.
Going to smaller nodes can be detrimental to standby power due to
increased leakage. Trying to keep the standby power low when reducing
the geometry can lead to speeds that are almost the same as the larger
geometry, so unless you needed to pack more into the same die size you
don't really buy anything. I also don't think that the ICE line is
central to Lattice's future business model. ICE5 Ultra is likely the
end of the line for it. (probably have to eat my words


--
Gabor

 

[Rick C]

On Saturday, November 30, 2019 at 9:32:11 AM UTC-5, Gabor wrote:

On Saturday, 11/30/2019 8:54 AM, Rick C wrote:
On Saturday, November 30, 2019 at 2:26:31 AM UTC-5, Brane2 wrote:
Dne petek, 29. november 2019 15.21.42 UTC je oseba Rick C napisala:

I would ask what you have been smoking!??? I see parts that are not SERDES and not automotive. They are in the same table as the rest of the ECP5 non-automotive parts, on the right. I guess they are easy to overlook on the right side of the table.

It looks like they've been arearangig those pages. Previous version had each family version in separate table, with its own enclosure combinations.
I've seen new version without updated headers, which was fixed shortly after...


Not sure what an ICE50 would be other than a step backwards. The original devices were the ICE65 made on a 65 nm process which was very quickly replaced with smaller, but more static power hungry ICE40 parts on a 40 nm process. So ICE50 would be reversing course. Maybe ICE28, but who knows?

I've meant to say next-gen. Didn't know that "40" signifies geometry size.
But while at it, with densities that low, geometry shrink is not always optimal, so who knows, they might do that or stay on 4onm buit use fundamentally different process etc.

In the old days a shrink would be done on a design that reduced dimensions in the X and Y direction without changing the Z dimension features. This was less work than a full scaling but didn't offer the full benefits (I might have the terms switched). I don't think they do that anymore as the details involved are more complex and since these processes are not at all on the cutting edge, but rather are well established "mature" processes at this point and so it is unlikely they would do anything other than move from one process to the next.

I think there are issues with combining Flash with logic processes and that typically lags the state of the art by several generations. The ICE parts don't have flash, they have RAM and one time programmable PROM.

I believe the ICE parts are not about speed, rather cost, so presently the 40 nm process is "good enough". We will see what the recent competition will do for that.


ICE parts were all about low power, especially ultra-low standby power.
Going to smaller nodes can be detrimental to standby power due to
increased leakage. Trying to keep the standby power low when reducing
the geometry can lead to speeds that are almost the same as the larger
geometry, so unless you needed to pack more into the same die size you
don't really buy anything. I also don't think that the ICE line is
central to Lattice's future business model. ICE5 Ultra is likely the
end of the line for it. (probably have to eat my words

I believe they can optimize a given geometry for power vs. speed, but I don't know for sure. The original 65 nm ICE65 chips had static power specs of low double digit uA. The ICE40 products are 100 uA for most I believe. There are some very small devices ~400 LUTs that are lower and one of the new Ultra families get below 50 uA I believe. Still, they took a hit on this moving to 40 nm. With all the focus on low power in computing, do you think they can't move down a process node or two and retain the current static levels?

--

Rick C.

-- Get 1,000 miles of free Supercharging
-- Tesla referral code - https://ts.la/richard11209