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trescot@gmail.com
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I have a JTAG scan chain where during shift state I scan-in and
scan-out multiple data. I scan-in the input data and scan-out the
processed data and this process repeats several times. So its like a
sort of streaming. I have a counter which counts # of bits to be
scanned in. So I can stay in shift_dr and scan in any # of words and
simultaneously scan-out data.
I cannot stop the counter in between so there cannot be any extra state
to upload data in shift reg.
The rtl is as below.
always @(negedge ntrst or posedge clk)
if (!ntrst)
shift_reg <= {32{1'b0}};
else if (shift_dr) begin
if (counter==32)
begin
shift_reg <= {tdi,status_out[31:1]};
tdo <= status_out[0];
end
else
begin
shift_reg <= {tdi,shift_reg[31:1]};
tdo <= shift_reg[0];
end
end
assign status_out = ..... // status report to be scanned out.
always @(negedge ntrst or posedge clk)
if (!ntrst)
input_data <= {32{1'b0}};
else begin
if (counter==32) input_data <= shift_reg;
end
Any suggestions ?
Trescot
scan-out multiple data. I scan-in the input data and scan-out the
processed data and this process repeats several times. So its like a
sort of streaming. I have a counter which counts # of bits to be
scanned in. So I can stay in shift_dr and scan in any # of words and
simultaneously scan-out data.
I cannot stop the counter in between so there cannot be any extra state
to upload data in shift reg.
The rtl is as below.
always @(negedge ntrst or posedge clk)
if (!ntrst)
shift_reg <= {32{1'b0}};
else if (shift_dr) begin
if (counter==32)
begin
shift_reg <= {tdi,status_out[31:1]};
tdo <= status_out[0];
end
else
begin
shift_reg <= {tdi,shift_reg[31:1]};
tdo <= shift_reg[0];
end
end
assign status_out = ..... // status report to be scanned out.
always @(negedge ntrst or posedge clk)
if (!ntrst)
input_data <= {32{1'b0}};
else begin
if (counter==32) input_data <= shift_reg;
end
Any suggestions ?
Trescot