Jove: The Open Verification Environment for Java

[Jon Nall]

Newisys <http://www.newisys.com/> is pleased to announce the release of
Jove: The Open Verification Environment for the Java (TM) Platform. Jove is
a set of Java APIs and tools to enable Verilog hardware design verification
of ASICs and FPGAs using the Java programming language. It contains
components that accomplish the following:

   * Verilog simulator interaction (via PLI 2.0 aka VPI)
   * Standalone behavioral simulation (i.e. a discrete event simulator)
   * Thread and event synchronization
   * Design Verification abstractions (e.g. clock-relative signal access,
mailboxes, semaphores)
   * Constraint-based randomization
   * Dynamic Verilog shell generation

Jove has been tested extensively with Synopsys VCS and to a lesser extent
with the GPL version of cver by Pragmatic C Software.

Information regarding the state of the project as well as the motivations
behind it is available in the FAQ
<http://jove.sf.net/docs/jove-faq/index.html>.

Binary and source code distributions are available at http://jove.sf.net/.

Jove is licensed under the Open Software License 2.0
<http://opensource.org/licenses/osl-2.0.php>.

Java is a registered trademark of Sun Microsystems, Inc. in the U.S. or
other countries.