Issues on Clockless UART

[Shashi]

Hi,
I'm doing a project in clockless uart..as u know that the primary
function of uart is parallel to serial conversion while transmitting
and serial to paralel conversion while receiving..I was wondering if
someone could tell me as how can i do a parallel to serial conversion
and vice versa without using a clock.

Note: This is a circuit whoch doesnt use a clock at all/ Asynchronous
Circuit/Clockless Circuit.

Thank You
SHASHI

 

[Jonathan Bromley]

On 21 Apr 2004 13:05:24 -0700, shashi22k@rediffmail.com (Shashi)
wrote:

Hi,
I'm doing a project in clockless uart..as u know that the primary
function of uart is parallel to serial conversion while transmitting
and serial to paralel conversion while receiving..I was wondering if
someone could tell me as how can i do a parallel to serial conversion
and vice versa without using a clock.

Note: This is a circuit whoch doesnt use a clock at all/ Asynchronous
Circuit/Clockless Circuit.

On comp.arch.fpga you already received many replies telling you
that it's not practical. Asynchronous serial data can only be
deserialised by "dead reckoning" of time from the start bit,
since there is no guarantee of any data transitions between
start bit and stop bit. It is just possible to imagine a self-
timed circuit that uses an array of one-shot timers, all initiated
by the start bit, with each of the timers expiring at the centre
of the bit period for each bit. But this is only a clock by
some other name. And when I said "it is just possible to imagine",
I meant "if you are lying in bed with a raging fever, you might
have a vision in your delirium".

I suppose that, alternatively, you could pass the signal through
a very long tapped delay line. Quantification of "very long" is
left as an exercise for the student
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL, Verilog, SystemC, Perl, Tcl/Tk, Verification, Project Services

Doulos Ltd. Church Hatch, 22 Market Place, Ringwood, BH24 1AW, UK
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The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.

 

[glen herrmannsfeldt]

Jonathan Bromley wrote:

(snip)

I suppose that, alternatively, you could pass the signal through
a very long tapped delay line. Quantification of "very long" is
left as an exercise for the student

An acoustic delay line, such as the mercury delay lines use for
memory on computers before the days of magnetic core might do it.

-- glen

 

[Jan Panteltje]

On a sunny day (Sun, 02 May 2004 08:02:57 GMT) it happened glen herrmannsfeldt
<gah@ugcs.caltech.edu> wrote in <RW1lc.13033$Ik.1012320@attbi_s53>:

Jonathan Bromley wrote:

(snip)

I suppose that, alternatively, you could pass the signal through
a very long tapped delay line. Quantification of "very long" is
left as an exercise for the student

An acoustic delay line, such as the mercury delay lines use for
memory on computers before the days of magnetic core might do it.

For a fast UART couple of hundred meters of coax.

 

[bj Porcella]

LOL
Sounds interesting.... but even if one could figure where to put the
aps - and get the serial data moved to a register........ what next??
Gonna interact with an I/O system without a clock??? Perhaps it is
possible.

--
bj Porcella
http://pages.sbcglobal.net/bporcella/
"Jan Panteltje" <pNaonStpealmtje@yahoo.com> wrote in message
news:c72u3j$9h0$1@news.epidc.co.kr...

On a sunny day (Sun, 02 May 2004 08:02:57 GMT) it happened glen
herrmannsfeldt
gah@ugcs.caltech.edu> wrote in <RW1lc.13033$Ik.1012320@attbi_s53>:

Jonathan Bromley wrote:

(snip)

I suppose that, alternatively, you could pass the signal through
a very long tapped delay line. Quantification of "very long" is
left as an exercise for the student

An acoustic delay line, such as the mercury delay lines use for
memory on computers before the days of magnetic core might do it.

For a fast UART couple of hundred meters of coax.