ISE 11.5 to ISE 12.3 migration problem

[Rajeev]

I have a fully debugged design in ISE 11.3 and now having trouble gettin
it to work in ISE 12.3. With XST option "Keep Hierarchy" unchecked, all m
input ports other than “clock” are REMOVED during optimization
However, with "Keep Hierarchy" option turned on, the problem goes away an
all the inputs show up in the pin report but it takes long time to compile
Has anyone experienced similar problem? Am I missing anything?

Thanks

--Rajeev



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Posted through http://www.FPGARelated.com

 

[ghelbig]

On Dec 14, 7:50 am, "Rajeev" <rajeevph@n_o_s_p_a_m.gmail.com> wrote:

I have a fully debugged design in ISE 11.3 and now having trouble getting
it to work in ISE 12.3. With XST option "Keep Hierarchy" unchecked, all my
input ports other than “clock” are REMOVED during optimization.
However, with "Keep Hierarchy" option turned on, the problem goes away and
all the inputs show up in the pin report but it takes long time to compile.
Has anyone experienced similar problem? Am I missing anything?

Thanks

--Rajeev

---------------------------------------        
Posted throughhttp://www.FPGARelated.com

It will be fixed in 12.4

Seriously, open a web case. Something is very wrong - if the inputs
are optimized away, then the outputs should be optimized away also.

G.