It depends on how the FPU is specified.
Don't know, but there are a few places you could look:
Thanks you for you kindly reply.
So, do you mean "+-*/" operator in Verilog, and $bitstoreal(),
Hmm, I needn't that. So, what is the different between the IEEE-754
In that case, it's probably better (for a beginner) to consider
NO!!!!! I think that no synthesis tool handles real numbers.
If you use BCD then each decimal digit is stored as a
As someone pointed out to me on this group a few days ago, yes,
Yes, But, in this case, how can I implemente a * and / about BCD ? By
Hmm, thanks, Yes, I look into the opencores/fpu module. But, I found
operator ? Yes, maybe it is quite ugly code.
synthesisable ?
If a format like:On 5ć27ćĽ, ĺĺž10:24, Jonathan Bromley <jonathan.brom...@MYCOMPANY.com
wrote:
On 27 May 2007 05:50:30 -0700,
Leon zhang <leonca...@gmail.com> wrote:
Thanks you for you kindly reply.
Yes, What I want is a simple float arithmetic unit for a Calculator.
In that case, it's probably better (for a beginner) to consider
BCD arithmetic, and floating-point with powers of 10 instead
of powers of 2. Â This will save you the very large bother of
conversion between display formats and internal representation,
and it will be plenty fast enough.
Yes, But, in this case, how can I implemente a * and / about BCD ? By
the way, for synopsys IC, the multiplication is synthesisable, while
division is not synthesisable. Is it synthesisable on FPGA tools?
Even better, use a soft-core microprocessor and code
the calculations as software.
Hmm, thanks, Yes, I look into the opencores/fpu module. But, I found
it implemented the division by "/" operator. So,
is it synthesisable ? Â Any more suggestion about it ?
If it is only the four arithmetic operations +-*/ then
I would guess I could probably get working RTL in that time.
So, do you mean "+-*/" operator in Verilog, and $bitstoreal(),
$realtobits() is the solution for this ?
NO!!!!! Â I think that no synthesis tool handles real numbers.
You must create the floating point operations yourself.
Somewhere, inside those floating-point operations, there
will be simple integer arithmetic operations. Â For that,
of course you can use the standard Verilog operators.
And, how it works in depth ?
If you use BCD then each decimal digit is stored as a
separate 4-bit register, and you can do the arithmetic
in exactly the same way you were taught at school, digit
by digit. Â You will need a state machine or controller
to manage the calculation process, of course.
Yes, how about I convert it into integer number. then use the "*"
operator ? Yes, maybe it is quite ugly code.
So, what is the different between the IEEE-754
and the "real" type in verilog ? $bitstoreal() could encode it to
IEEE-754 data format?
As someone pointed out to me on this group a few days ago, yes,
$realtobits converts from Verilog 'real' to 64-bit IEEE-754
floating-point representation. Â Again, though, it is not
synthesisable by any tool I know of.
So, the two ones is just for test only ? It why it is not
synthesisable ?
Thanks in advance.
--
Jonathan Bromley, Consultant
DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services
Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan.brom...@MYCOMPANY.comhttp://www.MYCOMPANY.com
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are not the views of Doulos Ltd., unless specifically stated.- Hide quoted text -
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probably don't have to take the 2's complement with theOn May 28, 4:04Â am, Leon zhang <leonca...@gmail.com> wrote:
On 5ć27ćĽ, ĺĺž10:24, Jonathan Bromley <jonathan.brom...@MYCOMPANY.com
wrote:
On 27 May 2007 05:50:30 -0700,
Leon zhang <leonca...@gmail.com> wrote:
Thanks you for you kindly reply.
Yes, What I want is a simple float arithmetic unit for a Calculator.
In that case, it's probably better (for a beginner) to consider
BCD arithmetic, and floating-point with powers of 10 instead
of powers of 2. Â This will save you the very large bother of
conversion between display formats and internal representation,
and it will be plenty fast enough.
Yes, But, in this case, how can I implemente a * and / about BCD ? By
the way, for synopsys IC, the multiplication is synthesisable, while
division is not synthesisable. Is it synthesisable on FPGA tools?
Even better, use a soft-core microprocessor and code
the calculations as software.
Hmm, thanks, Yes, I look into the opencores/fpu module. But, I found
it implemented the division by "/" operator. So,
is it synthesisable ? Â Any more suggestion about it ?
If it is only the four arithmetic operations +-*/ then
I would guess I could probably get working RTL in that time.
So, do you mean "+-*/" operator in Verilog, and $bitstoreal(),
$realtobits() is the solution for this ?
NO!!!!! Â I think that no synthesis tool handles real numbers.
You must create the floating point operations yourself.
Somewhere, inside those floating-point operations, there
will be simple integer arithmetic operations. Â For that,
of course you can use the standard Verilog operators.
And, how it works in depth ?
If you use BCD then each decimal digit is stored as a
separate 4-bit register, and you can do the arithmetic
in exactly the same way you were taught at school, digit
by digit. Â You will need a state machine or controller
to manage the calculation process, of course.
Yes, how about I convert it into integer number. then use the "*"
operator ? Yes, maybe it is quite ugly code.
So, what is the different between the IEEE-754
and the "real" type in verilog ? $bitstoreal() could encode it to
IEEE-754 data format?
As someone pointed out to me on this group a few days ago, yes,
$realtobits converts from Verilog 'real' to 64-bit IEEE-754
floating-point representation. Â Again, though, it is not
synthesisable by any tool I know of.
So, the two ones is just for test only ? It why it is not
synthesisable ?
Thanks in advance.
--
Jonathan Bromley, Consultant
DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services
Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan.brom...@MYCOMPANY.comhttp://www.MYCOMPANY.com
The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.- Hide quoted text -
- Show quoted text -- Hide quoted text -
- Show quoted text -
If a format like:
--------------------------------------------------------------
(sign_bit, f16.15, EXP) Â can be agreed upon for the inputs and
outputs, then I think one can start thinking it through.
f16.15 is normalized (MSB is one) sixteen bits, fifteen bits left of
the decimal point.
--------------------------------------------------------------
A 16x16 unsigned mult would give f32.30 Â (Synthesizable)
If the MSB is one, take the upper 16 bits and account for it in the
exponent, if not, skip the MSB and take the next 16 bits.
Add the exponents (plus one maybe) and check for overflow or
underflow. Â I guess you would have to check for zero operands too.
Check the sign bits and take the 2's complement if necessary and set
the new sign bit.
--------------------------------------------------------------
I'm thinking something similar could be done for division.
Opencores.org has an unsigned serial divider and can divide 2 sixteen
bit numbers in about 16 clock cycles. Â Because the operands are
normalized, the result would be less than 2 but greater than 0.5
unless the numerator or denominator is zero.
--------------------------------------------------------------
I'm sure I have missed something and it is somewhat adhoc, but it is
another beginning.
Hope this helps.
Newman- Hide quoted text -
- Show quoted text -
Johnathan,On May 30, 2:24Â pm, Newman <newman5...@yahoo.com> wrote:
On May 28, 4:04Â am, Leon zhang <leonca...@gmail.com> wrote:
On 5ć27ćĽ, ĺĺž10:24, Jonathan Bromley <jonathan.brom...@MYCOMPANY.com
wrote:
On 27 May 2007 05:50:30 -0700,
Leon zhang <leonca...@gmail.com> wrote:
Thanks you for you kindly reply.
Yes, What I want is a simple float arithmetic unit for a Calculator.
In that case, it's probably better (for a beginner) to consider
BCD arithmetic, and floating-point with powers of 10 instead
of powers of 2. Â This will save you the very large bother of
conversion between display formats and internal representation,
and it will be plenty fast enough.
Yes, But, in this case, how can I implemente a * and / about BCD ? By
the way, for synopsys IC, the multiplication is synthesisable, while
division is not synthesisable. Is it synthesisable on FPGA tools?
Even better, use a soft-core microprocessor and code
the calculations as software.
Hmm, thanks, Yes, I look into the opencores/fpu module. But, I found
it implemented the division by "/" operator. So,
is it synthesisable ? Â Any more suggestion about it ?
If it is only the four arithmetic operations +-*/ then
I would guess I could probably get working RTL in that time.
So, do you mean "+-*/" operator in Verilog, and $bitstoreal(),
$realtobits() is the solution for this ?
NO!!!!! Â I think that no synthesis tool handles real numbers.
You must create the floating point operations yourself.
Somewhere, inside those floating-point operations, there
will be simple integer arithmetic operations. Â For that,
of course you can use the standard Verilog operators.
And, how it works in depth ?
If you use BCD then each decimal digit is stored as a
separate 4-bit register, and you can do the arithmetic
in exactly the same way you were taught at school, digit
by digit. Â You will need a state machine or controller
to manage the calculation process, of course.
Yes, how about I convert it into integer number. then use the "*"
operator ? Yes, maybe it is quite ugly code.
So, what is the different between the IEEE-754
and the "real" type in verilog ? $bitstoreal() could encode it to
IEEE-754 data format?
As someone pointed out to me on this group a few days ago, yes,
$realtobits converts from Verilog 'real' to 64-bit IEEE-754
floating-point representation. Â Again, though, it is not
synthesisable by any tool I know of.
So, the two ones is just for test only ? It why it is not
synthesisable ?
Thanks in advance.
--
Jonathan Bromley, Consultant
DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services
Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan.brom...@MYCOMPANY.comhttp://www.MYCOMPANY.com
The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.- Hide quoted text -
- Show quoted text -- Hide quoted text -
- Show quoted text -
If a format like:
--------------------------------------------------------------
(sign_bit, f16.15, EXP) Â can be agreed upon for the inputs and
outputs, then I think one can start thinking it through.
f16.15 is normalized (MSB is one) sixteen bits, fifteen bits left of
the decimal point.
--------------------------------------------------------------
A 16x16 unsigned mult would give f32.30 Â (Synthesizable)
If the MSB is one, take the upper 16 bits and account for it in the
exponent, if not, skip the MSB and take the next 16 bits.
Add the exponents (plus one maybe) and check for overflow or
underflow. Â I guess you would have to check for zero operands too.
Check the sign bits and take the 2's complement if necessary and set
the new sign bit.
--------------------------------------------------------------
I'm thinking something similar could be done for division.
Opencores.org has an unsigned serial divider and can divide 2 sixteen
bit numbers in about 16 clock cycles. Â Because the operands are
normalized, the result would be less than 2 but greater than 0.5
unless the numerator or denominator is zero.
--------------------------------------------------------------
I'm sure I have missed something and it is somewhat adhoc, but it is
another beginning.
Hope this helps.
Newman- Hide quoted text -
- Show quoted text -
probably don't have to take the 2's complement with the
multiplication, just change the sign bit.
Newman- Hide quoted text -
- Show quoted text -