is there a way to do file I/O during simulation using Verilo

W

walala

Guest
Dear all,

I want to ask a question about FILE I/O using Verilog during
simulation. My project requires a close collaboration between matlab
and Verilog simulation. I need to import data generated from matlab
into Verilog program and then execute and get results exported into
matlab for further analysis.

Is there a way to open/save file for exchanging data in Verilog?

Thanks a lot,

-Walala
 
We do that here, mostly to go from Matlab to Verilog. In Matlab, we
write out files of hex values that we read in Verilog using $readmemh.

I'm not the Matlab expert here but for Matlab file I/O, see the docs
for fopen, fclose, fprintf, fscanf, num2hex, and related commands.

For Verilog, lookup $fopen, $fclose, $fdisplay, and $fwrite for
writing files. Also see $readmemh and $readmemb for reading a file all
at once. If you've got a simulator that supports the Verilog-2001 file
I/O tasks, you can use those to do line-based file reading and more.
It basically gives you the file I/O capabilities you might be used to
with C. If you don't have a simulator that supports that, there's free
PLI code available to acheive the same effect. Search for "chris spear
pli" and you should find it.

-cb
 
mizhael@yahoo.com (walala) wrote in message news:<6f348bd1.0308102021.62c5c196@posting.google.com>...
I want to ask a question about FILE I/O using Verilog during
simulation. My project requires a close collaboration between matlab
and Verilog simulation. I need to import data generated from matlab
into Verilog program and then execute and get results exported into
matlab for further analysis.

Is there a way to open/save file for exchanging data in Verilog?
If your Verilog simulator supports the Verilog-2001 file I/O
extensions, then yes.

In Verilog-1995, file I/O was rather limited. The only kind of
file read available was $readmem. PLI could be used for this too.
 
mizhael@yahoo.com (walala) wrote in message news:<6f348bd1.0308102021.62c5c196@posting.google.com>...
Dear all,

I want to ask a question about FILE I/O using Verilog during
simulation. My project requires a close collaboration between matlab
and Verilog simulation. I need to import data generated from matlab
into Verilog program and then execute and get results exported into
matlab for further analysis.

Is there a way to open/save file for exchanging data in Verilog?
Sure. If you're using Verilog-2001, you can use the C-style file-I/O
functions, like $fscanf(), $fgets(), $fread, etc. Stuart Sutherland's
Verilog-2001 book gives a succint explanation of all of this.

If you're not using Verilog-2001, then you can look up Chris Spears'
file-I/O PLI library, which pretty much does the same thing.

--a
 

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