IP core design for FPGA

[danialgifani]

Dear my friend
actually i want to design the SRAM IP core for FPGA , i have one SRAM cell schematic and layout for different technology 90nm,.. first i need to generate benchmark for that or if find available bench mark to use this cell instead current cell then can verify my sram and then should be generate ip core for this module , i search in internet but could not find useful information to how to do that or this way is correct or not , so could you please help me even introduce the good references or the software requirement for this problem

i looking forward your helps


best regard