C
chainastole
Guest
I need a help in the following issue:
I want to automatically produce inputs,outputs,regs,etc declarations in
Verilog.
In order to do this I copy the signals name and with the help of the
kbd macro find the predefined location in the code, where to place the
signal's declaration. The declaration produced is without the signal's
range. The signal's range I would like to insert with the help of the
interactive function, which already exists in MacNamara verilog-mode.
I would like all this to be perfomed as a single command. I think that
the kbd macro, finding the declaration location, should perform all its
actions and after that invoke the interactive function with the prompt
open, but I don't know how to do this.
May anybody help?
I want to automatically produce inputs,outputs,regs,etc declarations in
Verilog.
In order to do this I copy the signals name and with the help of the
kbd macro find the predefined location in the code, where to place the
signal's declaration. The declaration produced is without the signal's
range. The signal's range I would like to insert with the help of the
interactive function, which already exists in MacNamara verilog-mode.
I would like all this to be perfomed as a single command. I think that
the kbd macro, finding the declaration location, should perform all its
actions and after that invoke the interactive function with the prompt
open, but I don't know how to do this.
May anybody help?