Interfacing with a 5v micro controller

J

Jay

Guest
Hey all.

I'm trying to interface a Spartan 3 with a 5 volt avr. In some of Xilinx's
documentation, (www.xilinx.com/support/answers/19146.htm) it is suggested
that to make the S3s IO 5v tolerant, a 300 ohm resistor be used to protect
the port from reverse current damage. However, instill might face logic
high problems as read from the avr. What would you suggest for a (small
footprint if possible) logic level converter?

Thanks in advance.
 
On Jan 26, 9:32 am, Jay <jpt03...@engr.uconn.edu> wrote:
Hey all.

I'm trying to interface a Spartan 3 with a 5 volt avr. In some of Xilinx's
documentation, (www.xilinx.com/support/answers/19146.htm) it is suggested
that to make the S3s IO 5v tolerant, a 300 ohm resistor be used to protect
the port from reverse current damage. However, instill might face logic
high problems as read from the avr. What would you suggest for a (small
footprint if possible) logic level converter?

Thanks in advance.
There are so many chips for level shifting that the best fit
will really depend on your particular design. How many
signals do you connect between the FPGA and the 5V
micro? How many are inputs to the FPGA, how many
outputs from the FPGA and how many are bidirectional?
Going from 3V to 5V, you probably want to look at 74ACT
series or something similar that can work with a 5V supply
but has "TTL" compatible Vih and Vil specs. Going from
5V to 3V you could use the resistor (unidirectional). For
bidirectional signals there are some parts with dual power
supply that can provide active drive to both sides. If the
signals are relatively slow, then you can use "Quickswitch"
style FET switches and pullup resistors to do level shifting
bidirectionally without any added control signals.

Regards,
Gabor
 
On Jan 26, 11:07 am, Gabor <ga...@alacron.com> wrote:
On Jan 26, 9:32 am, Jay <jpt03...@engr.uconn.edu> wrote:

Hey all.

I'm trying to interface a Spartan 3 with a 5 volt avr. In some of Xilinx's
documentation, (www.xilinx.com/support/answers/19146.htm) it is suggested
that to make the S3s IO 5v tolerant, a 300 ohm resistor be used to protect
the port from reverse current damage. However, instill might face logic
high problems as read from the avr. What would you suggest for a (small
footprint if possible) logic level converter?

Thanks in advance.

There are so many chips for level shifting that the best fit
will really depend on your particular design.  How many
signals do you connect between the FPGA and the 5V
micro?  How many are inputs to the FPGA, how many
outputs from the FPGA and how many are bidirectional?
Going from 3V to 5V, you probably want to look at 74ACT
series or something similar that can work with a 5V supply
but has "TTL" compatible Vih and Vil specs.  Going from
5V to 3V you could use the resistor (unidirectional).  For
bidirectional signals there are some parts with dual power
supply that can provide active drive to both sides.  If the
signals are relatively slow, then you can use "Quickswitch"
style FET switches and pullup resistors to do level shifting
bidirectionally without any added control signals.

Regards,
Gabor
One more point I forgot to add. The resistor trick doesn't
work with the newer Spartan 3A and 3AN series parts.
Those FPGA's don't have clamp diodes to Vcco.

-- Gabor
 
Gabor <gabor@alacron.com> wrote:
On Jan 26, 11:07 am, Gabor <ga...@alacron.com> wrote:
On Jan 26, 9:32 am, Jay <jpt03...@engr.uconn.edu> wrote:

Hey all.

I'm trying to interface a Spartan 3 with a 5 volt avr. In some of Xilinx's
documentation, (www.xilinx.com/support/answers/19146.htm) it is suggested
that to make the S3s IO 5v tolerant, a 300 ohm resistor be used to protect
the port from reverse current damage. However, instill might face logic
high problems as read from the avr. What would you suggest for a (small
footprint if possible) logic level converter?

Thanks in advance.

There are so many chips for level shifting that the best fit
will really depend on your particular design. How many
signals do you connect between the FPGA and the 5V
micro? How many are inputs to the FPGA, how many
outputs from the FPGA and how many are bidirectional?
Going from 3V to 5V, you probably want to look at 74ACT
series or something similar that can work with a 5V supply
but has "TTL" compatible Vih and Vil specs. Going from
5V to 3V you could use the resistor (unidirectional). For
bidirectional signals there are some parts with dual power
supply that can provide active drive to both sides. If the
signals are relatively slow, then you can use "Quickswitch"
style FET switches and pullup resistors to do level shifting
bidirectionally without any added control signals.

Regards,
Gabor

One more point I forgot to add. The resistor trick doesn't
work with the newer Spartan 3A and 3AN series parts.
Those FPGA's don't have clamp diodes to Vcco.

-- Gabor
Yeah in saw that. I'm not using the 3a, but i do need bi directional IO.
There will be a total of 13 pins to the uC that need this treatment.

Thanks for your help.
 
On 26 Jan., 18:41, Jay <jpt03...@engr.uconn.edu> wrote:
Gabor <ga...@alacron.com> wrote:
On Jan 26, 11:07 am, Gabor <ga...@alacron.com> wrote:
On Jan 26, 9:32 am, Jay <jpt03...@engr.uconn.edu> wrote:

Hey all.

I'm trying to interface a Spartan 3 with a 5 volt avr. In some of Xilinx's
documentation, (www.xilinx.com/support/answers/19146.htm) it is suggested
that to make the S3s IO 5v tolerant, a 300 ohm resistor be used to protect
the port from reverse current damage. However, instill might face logic
high problems as read from the avr. What would you suggest for a (small
footprint if possible) logic level converter?

Thanks in advance.

There are so many chips for level shifting that the best fit
will really depend on your particular design.  How many
signals do you connect between the FPGA and the 5V
micro?  How many are inputs to the FPGA, how many
outputs from the FPGA and how many are bidirectional?
Going from 3V to 5V, you probably want to look at 74ACT
series or something similar that can work with a 5V supply
but has "TTL" compatible Vih and Vil specs.  Going from
5V to 3V you could use the resistor (unidirectional).  For
bidirectional signals there are some parts with dual power
supply that can provide active drive to both sides.  If the
signals are relatively slow, then you can use "Quickswitch"
style FET switches and pullup resistors to do level shifting
bidirectionally without any added control signals.

Regards,
Gabor

One more point I forgot to add.  The resistor trick doesn't
work with the newer Spartan 3A and 3AN series parts.
Those FPGA's don't have clamp diodes to Vcco.

-- Gabor

Yeah in saw that. I'm not using the 3a, but i do need bi directional IO.
There will be a total of 13 pins to the uC that need this treatment.

Thanks for your help.
you can't change the supply for the AVR to something lower within the
specs of
the FPGA?

-Lasse
 
"langwadt@fonz.dk" <langwadt@fonz.dk> wrote:
On 26 Jan., 18:41, Jay <jpt03...@engr.uconn.edu> wrote:
Gabor <ga...@alacron.com> wrote:
On Jan 26, 11:07 am, Gabor <ga...@alacron.com> wrote:
On Jan 26, 9:32 am, Jay <jpt03...@engr.uconn.edu> wrote:

Hey all.

I'm trying to interface a Spartan 3 with a 5 volt avr. In some of Xilinx's
documentation, (www.xilinx.com/support/answers/19146.htm) it is suggested
that to make the S3s IO 5v tolerant, a 300 ohm resistor be used to protect
the port from reverse current damage. However, instill might face logic
high problems as read from the avr. What would you suggest for a (small
footprint if possible) logic level converter?

Thanks in advance.

There are so many chips for level shifting that the best fit
will really depend on your particular design. How many
signals do you connect between the FPGA and the 5V
micro? How many are inputs to the FPGA, how many
outputs from the FPGA and how many are bidirectional?
Going from 3V to 5V, you probably want to look at 74ACT
series or something similar that can work with a 5V supply
but has "TTL" compatible Vih and Vil specs. Going from
5V to 3V you could use the resistor (unidirectional). For
bidirectional signals there are some parts with dual power
supply that can provide active drive to both sides. If the
signals are relatively slow, then you can use "Quickswitch"
style FET switches and pullup resistors to do level shifting
bidirectionally without any added control signals.

Regards,
Gabor

One more point I forgot to add. The resistor trick doesn't
work with the newer Spartan 3A and 3AN series parts.
Those FPGA's don't have clamp diodes to Vcco.

-- Gabor

Yeah in saw that. I'm not using the 3a, but i do need bi directional IO.
There will be a total of 13 pins to the uC that need this treatment.

Thanks for your help.

you can't change the supply for the AVR to something lower within the
specs of
the FPGA?

-Lasse
No, I'm supporting an existing system. I've looked onto the 74act's and so
far they look like what I was looking for. I was just seeing if someone had
dealt with this before.
 
On Jan 26, 5:30 pm, Jay <jpt03...@engr.uconn.edu> wrote:
"langw...@fonz.dk" <langw...@fonz.dk> wrote:
On 26 Jan., 18:41, Jay <jpt03...@engr.uconn.edu> wrote:
Gabor <ga...@alacron.com> wrote:
On Jan 26, 11:07 am, Gabor <ga...@alacron.com> wrote:
On Jan 26, 9:32 am, Jay <jpt03...@engr.uconn.edu> wrote:

Hey all.

I'm trying to interface a Spartan 3 with a 5 volt avr. In some of Xilinx's
documentation, (www.xilinx.com/support/answers/19146.htm) it is suggested
that to make the S3s IO 5v tolerant, a 300 ohm resistor be used to protect
the port from reverse current damage. However, instill might face logic
high problems as read from the avr. What would you suggest for a (small
footprint if possible) logic level converter?

Thanks in advance.

There are so many chips for level shifting that the best fit
will really depend on your particular design.  How many
signals do you connect between the FPGA and the 5V
micro?  How many are inputs to the FPGA, how many
outputs from the FPGA and how many are bidirectional?
Going from 3V to 5V, you probably want to look at 74ACT
series or something similar that can work with a 5V supply
but has "TTL" compatible Vih and Vil specs.  Going from
5V to 3V you could use the resistor (unidirectional).  For
bidirectional signals there are some parts with dual power
supply that can provide active drive to both sides.  If the
signals are relatively slow, then you can use "Quickswitch"
style FET switches and pullup resistors to do level shifting
bidirectionally without any added control signals.

Regards,
Gabor

One more point I forgot to add.  The resistor trick doesn't
work with the newer Spartan 3A and 3AN series parts.
Those FPGA's don't have clamp diodes to Vcco.

-- Gabor

Yeah in saw that. I'm not using the 3a, but i do need bi directional IO.
There will be a total of 13 pins to the uC that need this treatment.

Thanks for your help.

you can't change the supply for the AVR to something lower within the
specs of
the FPGA?

-Lasse

No, I'm supporting an existing system. I've looked onto the 74act's and so
far they look like what I was looking for. I was just seeing if someone had
dealt with this before.
I'm surprised that you can't meet the input requirements for the 5
volt MCU. I guess they are using CMOS levels rather than TTL levels?
The only way to boost the output level of the FPGA to the 5 volt CMOS
level is with an active part like the ACT devices. But I'm not sure
how you can use that part to work in both directions and I am pretty
sure it won't do bidirectional, at least not in the same chip. The
problem is that a part with 3.3 volt power will not drive enough for a
5 volt CMOS input and a part with a 5 volt supply will over drive the
FPGA.

If you check the TI web site, they have all sorts of parts for level
shifting with all sorts of capabilities. I've found some pretty good
selection guides there.

Rick
 
have you read this document from xilinx?

it is used to interface a 3.3v FPGA to a 5V PCI bus

http://www.xilinx.com/support/documentation/application_notes/xapp646.pdf

this quickswitches will be maybe useful for you :)
 
On Jan 27, 5:07 am, Emanuele83 <emanuele83katam...@googlemail.com>
wrote:
have you read this document from xilinx?

it is used to interface a 3.3v FPGA to a 5V PCI bus

http://www.xilinx.com/support/documentation/application_notes/xapp646...

this quickswitches will be maybe useful for you  :)
Quick switches are good for limiting the voltage from a higher voltage
device to a lower voltage device. But they don't boost the output
voltage from the lower voltage device. CMOS levels between 5 volt and
3.3 volt logic are not compatible like TTL levels are. It sounds like
the OP has 5 volt CMOS level inputs which won't work with
quickswitches. That is why I recommended active devices like the ACT
or HCT. These days this is a common problem and there are many
specialized devices tailored to specific requirements.

Rick
 
On Jan 27, 8:53 am, rickman <gnu...@gmail.com> wrote:
On Jan 27, 5:07 am, Emanuele83 <emanuele83katam...@googlemail.com
wrote:

have you read this document from xilinx?

it is used to interface a 3.3v FPGA to a 5V PCI bus

http://www.xilinx.com/support/documentation/application_notes/xapp646...

this quickswitches will be maybe useful for you  :)

Quick switches are good for limiting the voltage from a higher voltage
device to a lower voltage device.  But they don't boost the output
voltage from the lower voltage device.  CMOS levels between 5 volt and
3.3 volt logic are not compatible like TTL levels are.  It sounds like
the OP has 5 volt CMOS level inputs which won't work with
quickswitches.  That is why I recommended active devices like the ACT
or HCT.  These days this is a common problem and there are many
specialized devices tailored to specific requirements.

Rick

Well, the quickswitches don't boost the voltage, but the pullup to 5V
on
the high voltage side will (eventually) boost the voltage. You should
think of quickswitches as open-drain for 3V to 5V CMOS apps.
It's really a little better than that because the channel conducts
until about 1V below the power supply, but if you need to meet
the CMOS levels the remainder of the rising waveform is only
supplied by the pullup. Whether this is acceptable really depends on
the speed of the interface and the drive capability of the 5V
side (for reducing the pullup value). You need to be
careful to choose a supply voltage that is low enough not
to cause overdrive on the 3V side, and also be aware that
some low supply voltage switches from TI actually have
charge pumps in them that would defeat the whole purpose
as a level shifter.

-- Gabor
 
On Jan 27, 9:00 am, Gabor <ga...@alacron.com> wrote:
On Jan 27, 8:53 am, rickman <gnu...@gmail.com> wrote:



On Jan 27, 5:07 am, Emanuele83 <emanuele83katam...@googlemail.com
wrote:

have you read this document from xilinx?

it is used to interface a 3.3v FPGA to a 5V PCI bus

http://www.xilinx.com/support/documentation/application_notes/xapp646....

this quickswitches will be maybe useful for you  :)

Quick switches are good for limiting the voltage from a higher voltage
device to a lower voltage device.  But they don't boost the output
voltage from the lower voltage device.  CMOS levels between 5 volt and
3.3 volt logic are not compatible like TTL levels are.  It sounds like
the OP has 5 volt CMOS level inputs which won't work with
quickswitches.  That is why I recommended active devices like the ACT
or HCT.  These days this is a common problem and there are many
specialized devices tailored to specific requirements.

Rick

Well, the quickswitches don't boost the voltage, but the pullup to 5V
on
the high voltage side will (eventually) boost the voltage.  You should
think of quickswitches as open-drain for 3V to 5V CMOS apps.
It's really a little better than that because the channel conducts
until about 1V below the power supply, but if you need to meet
the CMOS levels the remainder of the rising waveform is only
supplied by the pullup.  Whether this is acceptable really depends on
the speed of the interface and the drive capability of the 5V
side (for reducing the pullup value).  You need to be
careful to choose a supply voltage that is low enough not
to cause overdrive on the 3V side, and also be aware that
some low supply voltage switches from TI actually have
charge pumps in them that would defeat the whole purpose
as a level shifter.

-- Gabor
One volt below the 5 volt power rail blows out the Spartan inputs.
The quick switch products for level shifting add a diode in the Vcc
path so that the high level is limited to about 3.3 volts, below the
high level threshold on the 5 volt side. Yes, a pullup can help, but
as I found out on a design using a series limiting resistor, this can
affect performance. I'm not saying this won't work, but it is not
ideal for a 5 volt CMOS input. The devil is in the details which we
don't have.

Rick
 
Gabor <gabor@alacron.com> wrote:
On Jan 27, 8:53 am, rickman <gnu...@gmail.com> wrote:
On Jan 27, 5:07 am, Emanuele83 <emanuele83katam...@googlemail.com
wrote:

have you read this document from xilinx?

it is used to interface a 3.3v FPGA to a 5V PCI bus

http://www.xilinx.com/support/documentation/application_notes/xapp646...

this quickswitches will be maybe useful for you :)

Quick switches are good for limiting the voltage from a higher voltage
device to a lower voltage device. But they don't boost the output
voltage from the lower voltage device. CMOS levels between 5 volt and
3.3 volt logic are not compatible like TTL levels are. It sounds like
the OP has 5 volt CMOS level inputs which won't work with
quickswitches. That is why I recommended active devices like the ACT
or HCT. These days this is a common problem and there are many
specialized devices tailored to specific requirements.

Rick


Well, the quickswitches don't boost the voltage, but the pullup to 5V
on
the high voltage side will (eventually) boost the voltage. You should
think of quickswitches as open-drain for 3V to 5V CMOS apps.
It's really a little better than that because the channel conducts
until about 1V below the power supply, but if you need to meet
the CMOS levels the remainder of the rising waveform is only
supplied by the pullup. Whether this is acceptable really depends on
the speed of the interface and the drive capability of the 5V
side (for reducing the pullup value). You need to be
careful to choose a supply voltage that is low enough not
to cause overdrive on the 3V side, and also be aware that
some low supply voltage switches from TI actually have
charge pumps in them that would defeat the whole purpose
as a level shifter.

-- Gabor
Well, interestingly, it looks like i can update the uC. The atmega
48/88/168/328 have minimum VIH of .6Vcc. Since this uC runs on 5v, that
puts me at a minimum VIH of 3v. The FPGA should be able to drive the uC
high. I just have to worry about the reverse current.
 
Jay <jpt03002@engr.uconn.edu> wrote:

Gabor <gabor@alacron.com> wrote:
On Jan 26, 11:07 am, Gabor <ga...@alacron.com> wrote:
On Jan 26, 9:32 am, Jay <jpt03...@engr.uconn.edu> wrote:

Hey all.

I'm trying to interface a Spartan 3 with a 5 volt avr. In some of Xilinx's
documentation, (www.xilinx.com/support/answers/19146.htm) it is suggested
that to make the S3s IO 5v tolerant, a 300 ohm resistor be used to protect
the port from reverse current damage. However, instill might face logic
high problems as read from the avr. What would you suggest for a (small
footprint if possible) logic level converter?

Thanks in advance.

There are so many chips for level shifting that the best fit
will really depend on your particular design. How many
signals do you connect between the FPGA and the 5V
micro? How many are inputs to the FPGA, how many
outputs from the FPGA and how many are bidirectional?
Going from 3V to 5V, you probably want to look at 74ACT
series or something similar that can work with a 5V supply
but has "TTL" compatible Vih and Vil specs. Going from
5V to 3V you could use the resistor (unidirectional). For
bidirectional signals there are some parts with dual power
supply that can provide active drive to both sides. If the
signals are relatively slow, then you can use "Quickswitch"
style FET switches and pullup resistors to do level shifting
bidirectionally without any added control signals.

Regards,
Gabor

One more point I forgot to add. The resistor trick doesn't
work with the newer Spartan 3A and 3AN series parts.
Those FPGA's don't have clamp diodes to Vcco.

-- Gabor
Yeah in saw that. I'm not using the 3a, but i do need bi directional IO.
There will be a total of 13 pins to the uC that need this treatment.
Use resistors and 3.3V zeners.

--
Failure does not prove something is impossible, failure simply
indicates you are not using the right tools...
nico@nctdevpuntnl (punt=.)
--------------------------------------------------------------
 
rickman <gnuarm@gmail.com> wrote:
On Jan 27, 5:07 am, Emanuele83 <emanuele83katam...@googlemail.com
wrote:
have you read this document from xilinx?

it is used to interface a 3.3v FPGA to a 5V PCI bus

http://www.xilinx.com/support/documentation/application_notes/xapp646...

this quickswitches will be maybe useful for you  :)

Quick switches are good for limiting the voltage from a higher voltage
device to a lower voltage device. But they don't boost the output
voltage from the lower voltage device. CMOS levels between 5 volt and
3.3 volt logic are not compatible like TTL levels are. It sounds like
the OP has 5 volt CMOS level inputs which won't work with
quickswitches. That is why I recommended active devices like the ACT
or HCT. These days this is a common problem and there are many
specialized devices tailored to specific requirements.
BUSHOLD circuits, like in the AVR data bus, come to rescue here...
--
Uwe Bonnes bon@elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
 
Nico Coesel <nico@puntnl.niks> wrote:
Jay <jpt03002@engr.uconn.edu> wrote:

Gabor <gabor@alacron.com> wrote:
On Jan 26, 11:07 am, Gabor <ga...@alacron.com> wrote:
On Jan 26, 9:32 am, Jay <jpt03...@engr.uconn.edu> wrote:

Hey all.

I'm trying to interface a Spartan 3 with a 5 volt avr. In some of Xilinx's
documentation, (www.xilinx.com/support/answers/19146.htm) it is suggested
that to make the S3s IO 5v tolerant, a 300 ohm resistor be used to protect
the port from reverse current damage. However, instill might face logic
high problems as read from the avr. What would you suggest for a (small
footprint if possible) logic level converter?

Thanks in advance.

There are so many chips for level shifting that the best fit
will really depend on your particular design. How many
signals do you connect between the FPGA and the 5V
micro? How many are inputs to the FPGA, how many
outputs from the FPGA and how many are bidirectional?
Going from 3V to 5V, you probably want to look at 74ACT
series or something similar that can work with a 5V supply
but has "TTL" compatible Vih and Vil specs. Going from
5V to 3V you could use the resistor (unidirectional). For
bidirectional signals there are some parts with dual power
supply that can provide active drive to both sides. If the
signals are relatively slow, then you can use "Quickswitch"
style FET switches and pullup resistors to do level shifting
bidirectionally without any added control signals.

Regards,
Gabor

One more point I forgot to add. The resistor trick doesn't
work with the newer Spartan 3A and 3AN series parts.
Those FPGA's don't have clamp diodes to Vcco.

-- Gabor
Yeah in saw that. I'm not using the 3a, but i do need bi directional IO.
There will be a total of 13 pins to the uC that need this treatment.

Use resistors and 3.3V zeners.
I think after looking at some part finders, I'm going to use a couple
74lcx245's to give me 14 bidirectional ios. It'll keep my board layout a
bit nicer, too.
 

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