Guest
A research group of Da-Yeh university in Taiwan has developed some
automation utilities for cadence design system with some features as
following:
1. ready for analog, digital, mixed signal IC design,
2. ready for various generation of process technology,
3. systematically parametric design to save labor effort to a certain
extent, i.e., shorten the time to market,
4. Chip in a Day
A operation demo could be found at
http://ching-shun.myweb.hinet.net/ida-9405.wmv
contact person: cschen@mail.dyu.edu.tw
Have a nice day!
automation utilities for cadence design system with some features as
following:
1. ready for analog, digital, mixed signal IC design,
2. ready for various generation of process technology,
3. systematically parametric design to save labor effort to a certain
extent, i.e., shorten the time to market,
4. Chip in a Day
A operation demo could be found at
http://ching-shun.myweb.hinet.net/ida-9405.wmv
contact person: cschen@mail.dyu.edu.tw
Have a nice day!