intel 8253

[Pascal Garcia]

Hi,

Reading the datasheet of the 8253, I don't understand the sentence
concerning the mode 2 and 3 :
"In modes 2 and 3, if a CLK source other than the system clock is used,
GATE should be pulsed immediately following /WR of a new count value"

can somebody help me ?

best regards,

pascal

 

[Keyser Soze]

"Pascal Garcia" <pgarcia@irisa.fr> wrote in message news:e107q1$v4s$1@amma.irisa.fr...

Hi,

Reading the datasheet of the 8253, I don't understand the sentence concerning the mode 2 and 3 :
"In modes 2 and 3, if a CLK source other than the system clock is used, GATE should be pulsed immediately following /WR of a new
count value"

can somebody help me ?

best regards,

pascal

What the datasheet is trying hard to not say is that the counter has a flaw in the design.

When operating in auto reload (rate generator or square wave) modes with an external clock source the internal state of the GATE
input may be ambiguous after an update of the terminal count value of the counter.

Why the internal state of the GATE input maybe be wrong under these conditions is a somewhat involved explanation.

The solution suggested by the datasheet will force the internal state of the GATE input to a known state with the side affect of
causing the counter to restart and load the new terminal count value on the next external clock pulse.

Getting the 8253 to work correctly with an external clock can be quite a challenge when using modes 2 and 3.

 

[Pascal Garcia]

Keyser Soze wrote:

"Pascal Garcia" <pgarcia@irisa.fr> wrote in message news:e107q1$v4s$1@amma.irisa.fr...

thanks a lot !

What the datasheet is trying hard to not say is that the counter has a flaw in the design.

When operating in auto reload (rate generator or square wave) modes with an external clock source the internal state of the GATE
input may be ambiguous after an update of the terminal count value of the counter.

Why the internal state of the GATE input maybe be wrong under these conditions is a somewhat involved explanation.

The solution suggested by the datasheet will force the internal state of the GATE input to a known state with the side affect of
causing the counter to restart and load the new terminal count value on the next external clock pulse.

Getting the 8253 to work correctly with an external clock can be quite a challenge when using modes 2 and 3.