P
Pravin
Guest
Hello All,
I am facing a problem while instantiating an edf file in
verilog. My IP vendor has provided me FPGA Complier's edf file & ngo
file. but not .veo file.
Now I want do instantiation of this IP in verilog using ISE
6.1. I have tried box_type constraint. But it is not working.
Please tell me how to do this
I am facing a problem while instantiating an edf file in
verilog. My IP vendor has provided me FPGA Complier's edf file & ngo
file. but not .veo file.
Now I want do instantiation of this IP in verilog using ISE
6.1. I have tried box_type constraint. But it is not working.
Please tell me how to do this