init RAM with .rif

[bhb]

Hi,

I would like to use a file. rif in a functional Simulation (VHDL) with
ModelSim-Altera Software.
(RAM initialisation).

Does anyone have information, or better an example to use this file ?.

Thanks.

H.

 

[Mike Treseler]

bhb wrote:

I would like to use a file. rif in a functional Simulation (VHDL) with
ModelSim-Altera Software.
(RAM initialisation).

Does anyone have information, or better an example to use this file ?.

That's an altera.com question.

Why might I want to init a RAM during download?
There are two possible reasons.

1. I really need a rom, and should consider using a vhdl
constant array of vectors to infer the ROM from
block RAM without worrying about vendor specific files.

2. I have a local or external controller that
will do read and write cylces to this block ram.
In this case, consider inferring the RAM from
a template and init it (if need be) using the controller.

-- Mike Treseler