Induction heater questions

[Tim Williams]

Check my current progress here:
http://webpages.charter.net/dawill/tmoranwms/Electronics.html

Looking for suggestions on fast IGBTs suitable for offline operation (my
goal is a 240V operated unit capable of perhaps 10kW), so 400Vce or so, and
frequency up to 20kHz, possibly more, so they'll need to be fast.

I heard IGBTs have a bad habit of latching, is this true? What other
hazards should I expect, and how to handle them?

My driver circuit probably won't like the extra Cg so I'll accept any
suggestions for half or full bridge driver circuits or ICs too.

Speaking of bridge, what is the advantage to half vs. full bridge in the
final version?

I'd also like something more comfortable than a scope and crude frequency
control - anyone have suggestions for a good PLL (to control phase some
amount above resonance, to control power output) and/or voltage regulator
(to keep tank voltage constant - without dropping below resonance!)?

Oh, and what inductance should I expect to use for Lmatch, and since I won't
like the size of an air core unit, what kind of core and how many turns
would you suggest?

Tim

--
Deep Fryer: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms

 

[Reg Edwards]

While we are on the subject, can some kind person tell me the equation
for the theoretical mutual inductance (or coupling coefficient)
between a vertical circular loop mounted above a horizontal ground
plane of virtually infinite extent and thickness and with known
conductivity.

From the geometry, I feel it in my bones, it will be simple in form,
like -

M = Function( D, H, d, C ) micro-henrys

where -

D = loop diameter,
H = height of centre of loop above ground surface,
d = diameter of loop conductor,
C = conductivity, or resistivity of loop material.

It may be the conductor diameter is not required, the conductor being
merely a very thin filament.

Eventually, I wish to calculate the mutual inductance between the loop
and the ground and the loss resistance induced in the loop.

And I shall be eternally grateful.
----
Reg.

 

[Tim Williams]

Nothing eh? Too hard? Too easy? Too boring? Not boring enough?

*Sniff*... and I even took pictures of *glowing metal*!...

Tim

--
Deep Fryer: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms

"Tim Williams" <tmoranwms@charter.net> wrote in message
news:Z3SKe.27624$_41.9530@fe02.lga...

Check my current progress here:
http://webpages.charter.net/dawill/tmoranwms/Electronics.html

Looking for suggestions on fast IGBTs suitable for offline operation (my
goal is a 240V operated unit capable of perhaps 10kW), so 400Vce or so,
and
frequency up to 20kHz, possibly more, so they'll need to be fast.

I heard IGBTs have a bad habit of latching, is this true? What other
hazards should I expect, and how to handle them?

My driver circuit probably won't like the extra Cg so I'll accept any
suggestions for half or full bridge driver circuits or ICs too.

Speaking of bridge, what is the advantage to half vs. full bridge in the
final version?

I'd also like something more comfortable than a scope and crude frequency
control - anyone have suggestions for a good PLL (to control phase some
amount above resonance, to control power output) and/or voltage regulator
(to keep tank voltage constant - without dropping below resonance!)?

Oh, and what inductance should I expect to use for Lmatch, and since I
won't
like the size of an air core unit, what kind of core and how many turns
would you suggest?

Tim

--
Deep Fryer: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms

 

[Terry Given]

Tim Williams wrote:

Nothing eh? Too hard? Too easy? Too boring? Not boring enough?

*Sniff*... and I even took pictures of *glowing metal*!...

very good. turn the lights out, disable flash and take some more, that
would look really neat.

Tim

"Tim Williams" <tmoranwms@charter.net> wrote in message
news:Z3SKe.27624$_41.9530@fe02.lga...

Check my current progress here:
http://webpages.charter.net/dawill/tmoranwms/Electronics.html

Looking for suggestions on fast IGBTs suitable for offline operation (my
goal is a 240V operated unit capable of perhaps 10kW), so 400Vce or so,

and

frequency up to 20kHz, possibly more, so they'll need to be fast.

look at the switching energy vs switching frequency curves to get an
idea of how fast the IGBT is.

I heard IGBTs have a bad habit of latching, is this true? What other
hazards should I expect, and how to handle them?

?! dunno about latching. But you must ensure you win the pissing contest
against Cmiller. -ve gate bias is invariably used for all but the
smallest IGBTs, for exactly that reason - who cares if Cmiller gives a
10V jump in Vg if it starts out at -15V.

IGBTs really dont like being over-voltaged - kaboom. ultra-low
inductance from die to bus cap is the key here, along with generous
safety margins. google groups will show you a discussion I had with Win
about a 6kV IGBT used with rectified 3.3kV mains....

http://groups.google.co.nz/group/sci.electronics.design/browse_thread/thread/bf7e1e860fd70e48/1c5eed742b69d95e?lnk=st&q=3.3kV+group:sci.electronics.design+author:Terry+author:Given&rnum=1&hl=en#1c5eed742b69d95e

My driver circuit probably won't like the extra Cg so I'll accept any
suggestions for half or full bridge driver circuits or ICs too.

I've successfully used some IR half-bridge driver chips with little
IGBTs. make sure you have plenty of capacitance on the high-side power
supply, and a complementary emitter-follower is a good idea too.

depending on the IGBT, different Rgon and Rgoff can be useful. switching
energy curves provide the clues here.

gate drive inductance exacerbates miller effect, by increasing the
effective impedance seen by the IGBT for fast transients coupled thru
Cmiller.

clamping max Vg is a good plan too. I worked on one design where 6 300A
IGBTs were direct paralleled, at the end of 1m of ribbon cable. A
sizeable active clamp was required to prevent IGBT destruction. A later
version used an emitter follower at the IGBT (1mm from terminals) with
bucketloads of supply rail capacitance, clamp diodes etc, with a
source-terminated ribbon cable feed. And a humungous TVS whose job was
to blow the gate bond wires in the event of a C-G short, thereby
preventing destruction of the upstream circuitry.

Speaking of bridge, what is the advantage to half vs. full bridge in the
final version?

2x power from full bridge (2x voltage). Design-wise there is little or
no difference, the full bridge is just two half-bridge circuits. With a
half-bridge you may need to balance the cap voltage (one winding
connects to half-bridge, the other to DC bus cap mid-point).

I'd also like something more comfortable than a scope and crude frequency
control - anyone have suggestions for a good PLL (to control phase some
amount above resonance, to control power output) and/or voltage regulator
(to keep tank voltage constant - without dropping below resonance!)?

thats a bit trickier. a pulse-by-pulse current limit circuit is pretty
much mandatory if you want a robust design, but even that can snot
IGBTs. micro + V,I,T sensors + detailed thermal model = best solution

as for the actual controller, cant really say without a detailed
analysis. the problem is the symmetric nature of the resonance curve. at
a guess, design the VCO so it cant ever produce a frequency below
resonance, then convert AC Vtank to DC and control with error amp.

Oh, and what inductance should I expect to use for Lmatch, and since I

won't

like the size of an air core unit, what kind of core and how many turns
would you suggest?

Tim

?! at those frequencies you'll probably be stuck with gapped ferrite,
kool-mu or MPP. Vishay have a range of smt high current chokes designed
for VRMs (cpu buck converters), you can get a 1uH part that saturates at
100A or so. ETD cores are easy to wind and gap.

Toroids are a pain to wind, and cant be gapped without special cutting
equipment. I once tried a wide variety of diamond and tungsten-carbide
saws to do this. All I did was rip the teeth off, barely scratching the
ferrite. I gave up, and found a company that specialises in that.

as for what Lmatch you need, I'd need a bit more information before
guesstimating that.

its easy to cobble together a choke without any calculations. Just do a
"splat test" - google groups search me as author, s.e.d. and "splat".

That will give you both the inductance and saturation current in one
easy measurement. a few tests with different N shows NI = constant. As N
increases, L increases but Isat decreases. Then bung in a gap (0.1mm -
1mm) and watch L plummet as Isat skyrockets. Finally, take the cores
away, to see Lair_cored which wont saturate at all.

you'll find there is a law of diminishing returns - more turns means
higher L but lower Isat requiring a bigger gap, thus lowering L. IIRC
there will be a maxima for any given core. Plus of course the R
eventually gets in the way, as does the finite winding area.

Cheers
Terry

 

[Tim Williams]

Thanks for the reply

"Terry Given" <my_name@ieee.org> wrote in message
newschLe.2494$iM2.219326@news.xtra.co.nz...

very good. turn the lights out, disable flash and take some more, that
would look really neat.

Yea... too bad the camera sucks in low light. Most do..

look at the switching energy vs switching frequency curves to get an
idea of how fast the IGBT is.

Ok. I've been looking at turn-off times and there's always a 60-200+us
delay in there, does that exist or do I care about it?

?! dunno about latching. But you must ensure you win the pissing contest
against Cmiller. -ve gate bias is invariably used for all but the
smallest IGBTs, for exactly that reason - who cares if Cmiller gives a
10V jump in Vg if it starts out at -15V.

Ok. I'll have to use two transformers then (if I use transformers). Hmm,
duty cycle will do weird things to the voltage levels if I try that...

IGBTs really dont like being over-voltaged - kaboom. ultra-low
inductance from die to bus cap is the key here, along with generous
safety margins. google groups will show you a discussion I had with Win
about a 6kV IGBT used with rectified 3.3kV mains....
snip

Hmm, okay, good thing I've been eyeing 600V devices then. Those should be
better than 400V devices which "should" be fine for 240V mains.

I've successfully used some IR half-bridge driver chips with little
IGBTs. make sure you have plenty of capacitance on the high-side power
supply, and a complementary emitter-follower is a good idea too.

About like I've been doing, but at the transistor? But humm, negative gate
volts...floating power supply, charge pump???

gate drive inductance exacerbates miller effect, by increasing the
effective impedance seen by the IGBT for fast transients coupled thru
Cmiller.

For sure. BTW how much value is there in snubbing? At the moment I've just
got junction capacitance of the 6 FETs and that works fine for the speed
they switch at, apparently. Snubbing dV/dt would certainly reduce Imiller.

clamping max Vg is a good plan too. I worked on one design where 6 300A
IGBTs were direct paralleled, at the end of 1m of ribbon cable.

*Gong sound* (parasitic ringing, that is.)

2x power from full bridge (2x voltage).

I've got a whole impedance matching system going here, so that doesn't
really matter. If I took the other half bridge and paralelled the
transistors to one side, I could double the signal current with half the Vds
loss, at the expense of rewinding Lmatch with heavier wire and fewer turns.
Or is the better idea to go with higher signal voltage?

Design-wise there is little or
no difference, the full bridge is just two half-bridge circuits. With a
half-bridge you may need to balance the cap voltage (one winding
connects to half-bridge, the other to DC bus cap mid-point).

For sure it'll be rather uncomfortable to have the coil bouncing between
goalposts...

thats a bit trickier. a pulse-by-pulse current limit circuit is pretty
much mandatory if you want a robust design, but even that can snot
IGBTs. micro + V,I,T sensors + detailed thermal model = best solution

Um... okay. Anything *I* can do? <G>

as for the actual controller, cant really say without a detailed
analysis. the problem is the symmetric nature of the resonance curve.
at a guess, design the VCO so it cant ever produce a frequency below
resonance, then convert AC Vtank to DC and control with error amp.

'Course the problem is I'm sticking things in the coil and f changes ;-)

?! at those frequencies you'll probably be stuck with gapped ferrite,
kool-mu or MPP. Vishay have a range of smt high current chokes designed
for VRMs (cpu buck converters), you can get a 1uH part that saturates at
100A or so. ETD cores are easy to wind and gap.

1uH, humm I'm looking at maybe 100uH.

Toroids are a pain to wind, and cant be gapped without special cutting
equipment. I once tried a wide variety of diamond and tungsten-carbide
saws to do this. All I did was rip the teeth off, barely scratching the
ferrite. I gave up, and found a company that specialises in that.

I seem to remember Watt Sun hacksawed(!) either ferrite or powdered iron
cores at one time. Had to be P.I., ferrite is ceramic...

as for what Lmatch you need, I'd need a bit more information before
guesstimating that.

My thoughts exactly. (

Howzabout this, assume Q = 5 to 10 (with unloaded tank Q circa 30-50). For
20uF x 4uH at 18kHz, that's around 2-5 ohms effective impedance, no?

Of course Ctank is subtracted by Lmatch, since it's series resonant feeding
parallel resonant, sharing the same cap...I smell a simultaneous equation...

its easy to cobble together a choke without any calculations. Just do a
"splat test" - google groups search me as author, s.e.d. and "splat".

Ok...

Ah interesting. I did something like that with a MOSFET and two power
supply rails (think flyback converter pumping current from -V to +V), but
nothing so dangerous to a cap as that. ;-)

That will give you both the inductance and saturation current in one
easy measurement.

Too bad I have a Tek 475. Guess I'll be getting out the FETs and function
gen.

you'll find there is a law of diminishing returns - more turns means
higher L but lower Isat requiring a bigger gap, thus lowering L. IIRC
there will be a maxima for any given core. Plus of course the R
eventually gets in the way, as does the finite winding area.

Yup, ultimately ending in the truth that a core can only handle so much
energy until you have to buy a larger one.

Tim

--
Deep Fryer: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms

 

[Terry Given]

Tim Williams wrote:

Thanks for the reply

no worries.

"Terry Given" <my_name@ieee.org> wrote in message
newschLe.2494$iM2.219326@news.xtra.co.nz...

very good. turn the lights out, disable flash and take some more, that
would look really neat.


Yea... too bad the camera sucks in low light. Most do..


look at the switching energy vs switching frequency curves to get an
idea of how fast the IGBT is.


Ok. I've been looking at turn-off times and there's always a 60-200+us
delay in there, does that exist or do I care about it?

without double-checking (IOW I might be wrong), its because IGBTs turn
on like a FET but turn off like a BJT, so its due to having to sweep out
the minority carriers.

Again it depends on the IGBT, but ZCS and/or ZVS alter things. In
general ZCS is best for IGBTs. VPEC have a number of good papers on
doing this.

?! dunno about latching. But you must ensure you win the pissing contest
against Cmiller. -ve gate bias is invariably used for all but the
smallest IGBTs, for exactly that reason - who cares if Cmiller gives a
10V jump in Vg if it starts out at -15V.


Ok. I'll have to use two transformers then (if I use transformers). Hmm,
duty cycle will do weird things to the voltage levels if I try that...

not necessarily. crank up the voltage a bit, use a series zener with a
cap across it, and voila - DIY -ve bias sans extra supplies.

IGBTs really dont like being over-voltaged - kaboom. ultra-low
inductance from die to bus cap is the key here, along with generous
safety margins. google groups will show you a discussion I had with Win
about a 6kV IGBT used with rectified 3.3kV mains....

snip

Hmm, okay, good thing I've been eyeing 600V devices then. Those should be
better than 400V devices which "should" be fine for 240V mains.

the calcs in that link are the real clue. A 600V device will happily
shit its pants at 400V, if you give it a 200V spike. At 10A switching in
100ns that'll require 2uH of inductance, which you'd have to work at. If
for some reason the IGBT desats, Idesat will increase about ten-fold, so
Lboom drops to 200nH. Thats not so hard to achieve.

I've successfully used some IR half-bridge driver chips with little
IGBTs. make sure you have plenty of capacitance on the high-side power
supply, and a complementary emitter-follower is a good idea too.

About like I've been doing, but at the transistor? But humm, negative gate
volts...floating power supply, charge pump???

it all boils down to how stiff the gate drive is. If it aint stiff
enough, -ve bias will help. If it is stiff enough, -ve bias is
unnecessary. IR wrote a paper on this a few years back.

As an aside, I once worked on a FET UPS with Rg = 47k. the idea was to
slow dV/dt this way, and it did work. But one day ST changed the FET
(new process, "improved" parameters) and the circuit just latched at Vt.
A far better approach would have been an emitter-follower with a decent
RC delay on its input, and a nice low Zout. In the end we bought a whole
bunch of the old FETs.

gate drive inductance exacerbates miller effect, by increasing the
effective impedance seen by the IGBT for fast transients coupled thru
Cmiller.


For sure. BTW how much value is there in snubbing? At the moment I've just
got junction capacitance of the 6 FETs and that works fine for the speed
they switch at, apparently. Snubbing dV/dt would certainly reduce Imiller.

in theory snubbers aint required at all - square RBSOA. In practice
small RC snubbers can be convenient to stop any parasitic ringing. If
you try and control dV/dt that way, watch them catch fire - draw the
original V,I waveforms (I is roughly constant at switching edge), and
the desired V waveform. the difference between the two V waveforms,
multiplied by I, is how much power you'll dump into the snubber on each
transition.

Ideally you can just add C across the IGBT and adjust the deadtime, as
you are driving an inductive load which will charge/discharge the Cds
for you during dead-time. It'll go horribly wrong if you ever run a
non-inductive load.

clamping max Vg is a good plan too. I worked on one design where 6 300A
IGBTs were direct paralleled, at the end of 1m of ribbon cable.


*Gong sound* (parasitic ringing, that is.)


2x power from full bridge (2x voltage).


I've got a whole impedance matching system going here, so that doesn't
really matter. If I took the other half bridge and paralelled the
transistors to one side, I could double the signal current with half the Vds
loss, at the expense of rewinding Lmatch with heavier wire and fewer turns.
Or is the better idea to go with higher signal voltage?

OTTOMH I'm not sure thats right re. impedance matching.

beware how Vce changes with Ic. IGBTs optimised for switching tend to
have ratshit Vce-vs-Ic curves, and vice-versa - IOW fast switching or
low conduction losses, pick one. And at these low powers, just use a
bigger IGBT.

IMO until its too high, higher voltage will cause you less problems. As
current increases, skin/prox effect becomes a real pain, as does winding
the suckers.

Design-wise there is little or
no difference, the full bridge is just two half-bridge circuits. With a
half-bridge you may need to balance the cap voltage (one winding
connects to half-bridge, the other to DC bus cap mid-point).


For sure it'll be rather uncomfortable to have the coil bouncing between
goalposts...

Einstein says its OK, and the coil dont care.

thats a bit trickier. a pulse-by-pulse current limit circuit is pretty
much mandatory if you want a robust design, but even that can snot
IGBTs. micro + V,I,T sensors + detailed thermal model = best solution


Um... okay. Anything *I* can do? <G

have LM339, will travel.

as for the actual controller, cant really say without a detailed
analysis. the problem is the symmetric nature of the resonance curve.
at a guess, design the VCO so it cant ever produce a frequency below
resonance, then convert AC Vtank to DC and control with error amp.


'Course the problem is I'm sticking things in the coil and f changes ;-)

indeed. I suspect its non-trivial.

?! at those frequencies you'll probably be stuck with gapped ferrite,
kool-mu or MPP. Vishay have a range of smt high current chokes designed
for VRMs (cpu buck converters), you can get a 1uH part that saturates at
100A or so. ETD cores are easy to wind and gap.

1uH, humm I'm looking at maybe 100uH.


Toroids are a pain to wind, and cant be gapped without special cutting
equipment. I once tried a wide variety of diamond and tungsten-carbide
saws to do this. All I did was rip the teeth off, barely scratching the
ferrite. I gave up, and found a company that specialises in that.


I seem to remember Watt Sun hacksawed(!) either ferrite or powdered iron
cores at one time. Had to be P.I., ferrite is ceramic...

try it yourself, and watch all the teeth fall off the hacksaw blade. We
absolutely amazed the guy at Trade Tools by showing him his
diamond-toothed hacksaw blade sans teeth after a couple of swipes.

as for what Lmatch you need, I'd need a bit more information before
guesstimating that.


My thoughts exactly. (

Howzabout this, assume Q = 5 to 10 (with unloaded tank Q circa 30-50). For
20uF x 4uH at 18kHz, that's around 2-5 ohms effective impedance, no?

I dont know what your LC circuit looks like, but the impedance of each
of those is about 0.45 ohms at 18kHz.

Of course Ctank is subtracted by Lmatch, since it's series resonant feeding
parallel resonant, sharing the same cap...I smell a simultaneous equation...


its easy to cobble together a choke without any calculations. Just do a
"splat test" - google groups search me as author, s.e.d. and "splat".


Ok...

Ah interesting. I did something like that with a MOSFET and two power
supply rails (think flyback converter pumping current from -V to +V), but
nothing so dangerous to a cap as that. ;-)
That will give you both the inductance and saturation current in one
easy measurement.


Too bad I have a Tek 475. Guess I'll be getting out the FETs and function
gen.

the repetitive splat tester is really just a no-power smps. I now have a
much nicer one, made out of a little induction heater PCB

I built a couple dozen of these for glueing planar cores - its a
diagonal half-bridge (TL & BR FETs, BL & TR diodes) driven by a UCC3801
& HIP2100. The D-HB means all inductive energy is returned to the +13.8V
supply sans losses (except 2*schottky drops worth). The coil is a few
dozen turns wound around a machined steel heater, that is spring-loaded
and presses up against the lower core to be glued (thermosetting epoxy).
A bit of machined formica, and voila.

you'll find there is a law of diminishing returns - more turns means
higher L but lower Isat requiring a bigger gap, thus lowering L. IIRC
there will be a maxima for any given core. Plus of course the R
eventually gets in the way, as does the finite winding area.


Yup, ultimately ending in the truth that a core can only handle so much
energy until you have to buy a larger one.

IME the energy storage curve looks like an RC rise, so the point at
which it becomes useless to gap further is somewhat arbitrary.

Tim

Cheers
Terry

 

[Tim Williams]

"Terry Given" <my_name@ieee.org> wrote in message
news:0NvLe.2648$iM2.235909@news.xtra.co.nz...

Again it depends on the IGBT, but ZCS and/or ZVS alter things. In
general ZCS is best for IGBTs. VPEC have a number of good papers on
doing this.

That probably explains why I've seen designs for heaters running full coil
current through the transistor (or SCR). Current is low because voltage
(and turns) are high. I'm doing ZCS at turn-on, but ZVS in general
(assuming it turns off faster than swing increases Vce, which can be tweaked
with snubbers until slower than the transistors turn off).

Ok. I'll have to use two transformers then (if I use transformers).
Hmm,
duty cycle will do weird things to the voltage levels if I try that...

not necessarily. crank up the voltage a bit, use a series zener with a
cap across it, and voila - DIY -ve bias sans extra supplies.

Ah, true. I'll have to get some bigger zeners. <g>
(It has to handle turn-off and miller current, right? Or is that
forward-biased?)

the calcs in that link are the real clue. A 600V device will happily
shit its pants at 400V, if you give it a 200V spike. At 10A switching in
100ns that'll require 2uH of inductance, which you'd have to work at. If
for some reason the IGBT desats, Idesat will increase about ten-fold, so

Lboom drops to 200nH. Thats not so hard to achieve.

Ok... so IGBTs don't have the happy avalanche characteristic that I'm so
used to in BJTs and FETs... Suppose that's what the TVS's are for eh?

it all boils down to how stiff the gate drive is. If it aint stiff
enough, -ve bias will help. If it is stiff enough, -ve bias is
unnecessary. IR wrote a paper on this a few years back.

Ok, so if I slowed the collector swing massively and made a relatively stiff
drive transformer, I could keep the zero-volts-is-off deadtime circuit I use
now?

As an aside, I once worked on a FET UPS with Rg = 47k. the idea was to
slow dV/dt this way, and it did work.

Wow, doesn't that result in some hefty dissipation?

in theory snubbers aint required at all - square RBSOA. In practice
small RC snubbers can be convenient to stop any parasitic ringing. If
you try and control dV/dt that way, watch them catch fire - draw the
original V,I waveforms (I is roughly constant at switching edge), and
the desired V waveform. the difference between the two V waveforms,
multiplied by I, is how much power you'll dump into the snubber on each
transition.

I don't mean zobels, I mean raw capacitance, which I can do since I'm not
taking a big bite out of +340V.

Ideally you can just add C across the IGBT and adjust the deadtime, as
you are driving an inductive load which will charge/discharge the Cds
for you during dead-time. It'll go horribly wrong if you ever run a
non-inductive load.

- Yeah, that's what I mean. Not a problem as I don't intend on running
anything but an induction coil with the induction heater! <G>

I've got a whole impedance matching system going here, so that doesn't
really matter. . .

OTTOMH I'm not sure thats right re. impedance matching.

You sure? The inverter itself has a peak V, I output (namely 340V 30A real
power, who knows how many switched VAr from the matching inductor) and the
load is a resistance.

IMO until its too high, higher voltage will cause you less problems. As
current increases, skin/prox effect becomes a real pain, as does winding
the suckers.

Meh, winding is just fine. I'll probably find myself with 3/8" tubing in
the 10kW version anyway. If you mean by the inverter, it's not going to be
more than 30A or less than 340V since that's all it's getting! <g>

For sure it'll be rather uncomfortable to have the coil bouncing
between goalposts...

Einstein says its OK, and the coil dont care.

Yeah, but my three-pronged o-scope would have a heart attack, to put it
mildly!

Um... okay. Anything *I* can do? <G

have LM339, will travel.

....Anything *else* I can do? <g,dr>

try it yourself, and watch all the teeth fall off the hacksaw blade. We
absolutely amazed the guy at Trade Tools by showing him his
diamond-toothed hacksaw blade sans teeth after a couple of swipes.

Heh heh! Ever try some sharpened ferrite for a tool bit then? Sounds like
it could make quick work of alloy steel. ;-)

I dont know what your LC circuit looks like, but the impedance of each
of those is about 0.45 ohms at 18kHz.

Well, there ought to be a pic of the coil on my site. Calculated Q of the
coil is about 60, I don't know what the caps are like (hmm wonder if the
datasheet says, Digi-Key PF2224-ND) but I'd assume as much. That would
bring parallel Q to 30, no?

IME the energy storage curve looks like an RC rise, so the point at
which it becomes useless to gap further is somewhat arbitrary.

Gapping does make it gradually less of a core after all. The point of no
returns is only when a gapped core suddenly turns to no core at all,
something which doesn't happen in good, continuous reality!

Tim

--
Deep Fryer: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms

 

[Terry Given]

Tim Williams wrote:

"Terry Given" <my_name@ieee.org> wrote in message
news:0NvLe.2648$iM2.235909@news.xtra.co.nz...

Again it depends on the IGBT, but ZCS and/or ZVS alter things. In
general ZCS is best for IGBTs. VPEC have a number of good papers on
doing this.


That probably explains why I've seen designs for heaters running full coil
current through the transistor (or SCR). Current is low because voltage
(and turns) are high. I'm doing ZCS at turn-on, but ZVS in general
(assuming it turns off faster than swing increases Vce, which can be tweaked
with snubbers until slower than the transistors turn off).

AIUI ZVS doesnt solve the minority carrier problem (aka tail current).
so the improvement is nowhere near as great as with FETs.

Likewise ZCS turn ON. This eats the turn-on switching loss Eon, but does
nothing for Eoff. The ratios of Eon to Eoff vary dramatically with Rg,
with Eoff dominating for small Rg - which is what you would expect, as
lowering Rg wont reduce tail current

Ok. I'll have to use two transformers then (if I use transformers).
Hmm,
duty cycle will do weird things to the voltage levels if I try that...

not necessarily. crank up the voltage a bit, use a series zener with a
cap across it, and voila - DIY -ve bias sans extra supplies.


Ah, true. I'll have to get some bigger zeners. <g
(It has to handle turn-off and miller current, right? Or is that
forward-biased?)

Done this way the zener carries the turn-on gate current, and the cap
carries the turn-off gate current.

charge pumps can be used to good effect also, but UVLO is pretty much
mandatory for a gate drive with such a wobbly power supply (unless of
course you want random failures)

the calcs in that link are the real clue. A 600V device will happily
shit its pants at 400V, if you give it a 200V spike. At 10A switching in
100ns that'll require 2uH of inductance, which you'd have to work at. If

for some reason the IGBT desats, Idesat will increase about ten-fold, so
Lboom drops to 200nH. Thats not so hard to achieve.

Ok... so IGBTs don't have the happy avalanche characteristic that I'm so
used to in BJTs and FETs... Suppose that's what the TVS's are for eh?

you shouldnt need a TVS across your DC bus, and even if you do have one,
the inductance will again have to be low. In general the DC bus
capacitance is huge compared to the energy sloshed around per switching
cycle (by about the ratio of Fsw/Facline), so it "looks like" a TVS
anyway. its the parasitic L that will get you. I would use a 2-layer
PCB, pref. 0.8mm, for the DC Bus - a plane on either side, with suitable
creepage/clearances. Look at Semikrons mini-SKiiP for a neat low-L
package. TO-xxx devices can have very high lead inductance if mounted
poorly (IOW without consideration to minimising L), and its not hard to
get 1uH with a birds-nest prototype using hookup wire.

it all boils down to how stiff the gate drive is. If it aint stiff
enough, -ve bias will help. If it is stiff enough, -ve bias is
unnecessary. IR wrote a paper on this a few years back.


Ok, so if I slowed the collector swing massively and made a relatively stiff
drive transformer, I could keep the zero-volts-is-off deadtime circuit I use
now?

If Zg is low enough, you wouldnt need to slow the collector swing at
all. If you use a transformer, -ve bias should be a doddle. Unlike the
+ve supply (which controls Vcesat and Idesat) you dont really care about
the value, as long as its not enough to snot the gate (+/-Vgmax).

As an aside, I once worked on a FET UPS with Rg = 47k. the idea was to
slow dV/dt this way, and it did work.


Wow, doesn't that result in some hefty dissipation?

not at 60Hz. they wanted slow edges to drive a big X-cap.

in theory snubbers aint required at all - square RBSOA. In practice
small RC snubbers can be convenient to stop any parasitic ringing. If
you try and control dV/dt that way, watch them catch fire - draw the
original V,I waveforms (I is roughly constant at switching edge), and
the desired V waveform. the difference between the two V waveforms,
multiplied by I, is how much power you'll dump into the snubber on each
transition.


I don't mean zobels, I mean raw capacitance, which I can do since I'm not
taking a big bite out of +340V.


Ideally you can just add C across the IGBT and adjust the deadtime, as
you are driving an inductive load which will charge/discharge the Cds
for you during dead-time. It'll go horribly wrong if you ever run a
non-inductive load.


- Yeah, that's what I mean. Not a problem as I don't intend on running
anything but an induction coil with the induction heater! <G

I've got a whole impedance matching system going here, so that doesn't
really matter. . .

OTTOMH I'm not sure thats right re. impedance matching.


You sure? The inverter itself has a peak V, I output (namely 340V 30A real
power, who knows how many switched VAr from the matching inductor) and the
load is a resistance.

OTTOMH I was wrong

IMO until its too high, higher voltage will cause you less problems. As
current increases, skin/prox effect becomes a real pain, as does winding
the suckers.


Meh, winding is just fine. I'll probably find myself with 3/8" tubing in
the 10kW version anyway. If you mean by the inverter, it's not going to be
more than 30A or less than 340V since that's all it's getting! <g

nice work coil BTW.

Spiral-wound Cu strip would be nice. Then slip ETD cores on and voila.

For sure it'll be rather uncomfortable to have the coil bouncing
between goalposts...

Einstein says its OK, and the coil dont care.


Yeah, but my three-pronged o-scope would have a heart attack, to put it
mildly!

good point.

Um... okay. Anything *I* can do? <G

have LM339, will travel.


...Anything *else* I can do? <g,dr

<g,dr> ?!

desat sensors. If Vce > 10-15V while gate on, trip.

try it yourself, and watch all the teeth fall off the hacksaw blade. We
absolutely amazed the guy at Trade Tools by showing him his
diamond-toothed hacksaw blade sans teeth after a couple of swipes.


Heh heh! Ever try some sharpened ferrite for a tool bit then? Sounds like
it could make quick work of alloy steel. ;-)

no, havent tried that. But its incredibly brittle, so I doubt it would
be much use. I've cut myself with smashed 3F3 cores though - the
disadvantage to using a good glue is that when someone glues the wrong
cores together, its hard to fix. Luckily I have a hammer

I dont know what your LC circuit looks like, but the impedance of each
of those is about 0.45 ohms at 18kHz.


Well, there ought to be a pic of the coil on my site. Calculated Q of the
coil is about 60, I don't know what the caps are like (hmm wonder if the
datasheet says, Digi-Key PF2224-ND) but I'd assume as much. That would
bring parallel Q to 30, no?

so you have a C in parallel with the work coil, one end to DC bus
center-point, the other fed from Lmatch?

IME the energy storage curve looks like an RC rise, so the point at
which it becomes useless to gap further is somewhat arbitrary.


Gapping does make it gradually less of a core after all. The point of no
returns is only when a gapped core suddenly turns to no core at all,
something which doesn't happen in good, continuous reality!

Tim

yep. continuous but nonlinear due to fringing, which can be neglected
for small gaps.


Cheers
Terry

 

[Tim Williams]

"Terry Given" <my_name@ieee.org> wrote in message
news:yJyLe.2696$iM2.238634@news.xtra.co.nz...

Done this way the zener carries the turn-on gate current, and the cap
carries the turn-off gate current.

Needs to be a big cap I guess?

used to in BJTs and FETs... Suppose that's what the TVS's are for eh?

you shouldnt need a TVS across your DC bus, and even if you do have one,
the inductance will again have to be low.

Oh, I mean a TVS mounted at the device terminals, C-E. To protect it from
those evil voltage spikes...

In general the DC bus
capacitance is huge compared to the energy sloshed around per switching
cycle (by about the ratio of Fsw/Facline), so it "looks like" a TVS
anyway. its the parasitic L that will get you.

I would use a 2-layer PCB, pref. 0.8mm, for the DC Bus -

....Eww... PC boards...

TO-xxx devices can have very high lead inductance if mounted
poorly (IOW without consideration to minimising L), and its not hard to
get 1uH with a birds-nest prototype using hookup wire.

I prefer to run wires through air, and have no problem with soldering things
as close to the die as possible... didja see the hookups on my heatsink? I
put the gate drive twisted pair right on the transistors.

The source/drain hookups leave a bit to be desired, okay a lot to be
desired, <G> but it's out of the control loop, just acting in series with
Lmatch.

I will be using much copper tubing and/or sheet later.

If Zg is low enough, you wouldnt need to slow the collector swing at
all. If you use a transformer, -ve bias should be a doddle. Unlike the
+ve supply (which controls Vcesat and Idesat) you dont really care about
the value, as long as its not enough to snot the gate (+/-Vgmax).

Ok, so let's see, if I setup the 3524/494/7500 (and whatever other
equivalents) SMPS chip to do 25 to 75% duty cycle, with positive peak
voltage always above 15V, then it'll be +15/-45V at 75% duty cycle, +/-30V
(60Vp-p) at 50% and +45/-15V at 25%. With DC restorer that could come down
to 0V negative peak, but positive is still loopy without something to cap
it.

I could always rig a small DC-DC converter to supply +/-15VDC for each half
of the totem pole and use my existing circuit to run a driver, but geez...

Wow, doesn't that result in some hefty dissipation?

not at 60Hz. they wanted slow edges to drive a big X-cap.

I'd think that would be even worse?

nice work coil BTW.

Thanks

Spiral-wound Cu strip would be nice. Then slip ETD cores on and voila.

Yep!

g,dr> ?!

Grinning, ducking and running...

desat sensors. If Vce > 10-15V while gate on, trip.

Ok, that's one... but I need one for each transistor, unless LM339 can
handle +325V on one section's inputs.

At that rate I could make a HV diff pair out of suitable TO-92's or TO-5's
(if they're fast enough... low current so probably). Let's see, 2N3439T x 4
sits in my junk tray, 450V 20 or 100mA as I recall.

I've cut myself with smashed 3F3 cores though - the
disadvantage to using a good glue is that when someone glues the wrong
cores together, its hard to fix. Luckily I have a hammer

I heard boiling water can crack SMPS transformer varnish, but I've never
tried it myself.

so you have a C in parallel with the work coil, one end to DC bus
center-point, the other fed from Lmatch?

- No CT'd supply, so I return to ground instead. Hence the coupling
capacitor between bridge and Lmatch.

Tim

--
Deep Fryer: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms

 

[Terry Given]

Tim Williams wrote:

"Terry Given" <my_name@ieee.org> wrote in message
news:yJyLe.2696$iM2.238634@news.xtra.co.nz...

Done this way the zener carries the turn-on gate current, and the cap
carries the turn-off gate current.


Needs to be a big cap I guess?

just plenty bigger than Qgate/Vgate = Cgate

used to in BJTs and FETs... Suppose that's what the TVS's are for eh?

you shouldnt need a TVS across your DC bus, and even if you do have one,
the inductance will again have to be low.


Oh, I mean a TVS mounted at the device terminals, C-E. To protect it from
those evil voltage spikes...

stray L issues again, but if you must....beware the monstrous
capacitance of some of these though. Its cheaper to use your bus caps.

In general the DC bus
capacitance is huge compared to the energy sloshed around per switching
cycle (by about the ratio of Fsw/Facline), so it "looks like" a TVS
anyway. its the parasitic L that will get you.


I would use a 2-layer PCB, pref. 0.8mm, for the DC Bus -


...Eww... PC boards...

get some double-sided copper-clad pcb, and DIY-it. all ya gotta do is
drill holes for the caps, then remove (sharp knife + soldering iron) a
big piece around the "other" terminal.

TO-xxx devices can have very high lead inductance if mounted
poorly (IOW without consideration to minimising L), and its not hard to
get 1uH with a birds-nest prototype using hookup wire.


I prefer to run wires through air, and have no problem with soldering things
as close to the die as possible... didja see the hookups on my heatsink? I
put the gate drive twisted pair right on the transistors.

thats good.

The source/drain hookups leave a bit to be desired, okay a lot to be
desired, <G> but it's out of the control loop, just acting in series with
Lmatch.

and acting to give LdI/dt voltage drop every time the IGBTs switch.

I will be using much copper tubing and/or sheet later.

I'd do 2-bits of PCB. one as above, and a single-sided bit for the cap
center-point. It'll also help the current sharingh, at the moment the
closest caps do a lot of the HF work (for edges, L dictates current sharing)

If Zg is low enough, you wouldnt need to slow the collector swing at
all. If you use a transformer, -ve bias should be a doddle. Unlike the
+ve supply (which controls Vcesat and Idesat) you dont really care about
the value, as long as its not enough to snot the gate (+/-Vgmax).


Ok, so let's see, if I setup the 3524/494/7500 (and whatever other
equivalents) SMPS chip to do 25 to 75% duty cycle, with positive peak
voltage always above 15V, then it'll be +15/-45V at 75% duty cycle, +/-30V
(60Vp-p) at 50% and +45/-15V at 25%. With DC restorer that could come down
to 0V negative peak, but positive is still loopy without something to cap
it.

ST have some nice app notes showing a few tricks, as does Siliconix.

I could always rig a small DC-DC converter to supply +/-15VDC for each half
of the totem pole and use my existing circuit to run a driver, but geez...

thats how real men do it . Unnecessary at low power, but above a few
kW its mandatory. Though shalt not fuck with gate supplies....

Wow, doesn't that result in some hefty dissipation?

not at 60Hz. they wanted slow edges to drive a big X-cap.


I'd think that would be even worse?


nice work coil BTW.


Thanks


Spiral-wound Cu strip would be nice. Then slip ETD cores on and voila.


Yep!


g,dr> ?!


Grinning, ducking and running...


desat sensors. If Vce > 10-15V while gate on, trip.


Ok, that's one... but I need one for each transistor, unless LM339 can
handle +325V on one section's inputs.

lower IGBTs only is a good start, but think about it, it can be done
quite easily. A (compensated) voltage divider for Vout, as well as Vdc.
A bit of logic....

At that rate I could make a HV diff pair out of suitable TO-92's or TO-5's
(if they're fast enough... low current so probably). Let's see, 2N3439T x 4
sits in my junk tray, 450V 20 or 100mA as I recall.


I've cut myself with smashed 3F3 cores though - the
disadvantage to using a good glue is that when someone glues the wrong
cores together, its hard to fix. Luckily I have a hammer


I heard boiling water can crack SMPS transformer varnish, but I've never
tried it myself.

we changed glue, and now I use my hot-air rework station. The cores
often crack though.

so you have a C in parallel with the work coil, one end to DC bus
center-point, the other fed from Lmatch?


- No CT'd supply, so I return to ground instead. Hence the coupling
capacitor between bridge and Lmatch.

Ah, Lseries + Cseries + Lwork//Cshunt

Tim

Cheers
Terry

 

[Tim Williams]

"Terry Given" <my_name@ieee.org> wrote in message
news:QTCLe.2776$iM2.241186@news.xtra.co.nz...

Needs to be a big cap I guess?

just plenty bigger than Qgate/Vgate = Cgate

So yeah, a few uF or so, which is huge at this frequency. <g>

Oh, I mean a TVS mounted at the device terminals, C-E.

stray L issues again, but if you must....beware the monstrous
capacitance of some of these though. Its cheaper to use your bus caps.

Er, oh yeah, the diodes clamp it within buss limits...
Just have to make a stiff buss. Film caps any use here (maybe a filmlytic?)
or are standard comp-grade caps fine? (I was thinking of 4 or so Nippon
D77421B 780uF 450V caps, if that means anything.)

get some double-sided copper-clad pcb, and DIY-it. all ya gotta do is
drill holes for the caps, then remove (sharp knife + soldering iron) a
big piece around the "other" terminal.

True...

and acting to give LdI/dt voltage drop every time the IGBTs switch.

Yeah, but not much in comparison to the intended Lmatch that's there anyway.

I'd do 2-bits of PCB. one as above, and a single-sided bit for the cap
center-point. It'll also help the current sharingh, at the moment the
closest caps do a lot of the HF work (for edges, L dictates current
sharing)

Yeah, that's why I wonder if any film caps would be useful? They'd have to
be pretty large to do much good though.

ST have some nice app notes showing a few tricks, as does Siliconix.

Ok, will check them out...

thats how real men do it .

Naturally...sigh!

Unnecessary at low power, but above a few
kW its mandatory. Though shalt not fuck with gate supplies....

Think I could get away with 25VCT AC transformer with the secondary bouncing
along at 18kHz 240VAC? That'd save the trouble of making yet another
switching supply inside this thing...

lower IGBTs only is a good start, but think about it, it can be done
quite easily. A (compensated) voltage divider for Vout, as well as Vdc.
A bit of logic....

So just detect a smaller margin (say 1V) off a 24Vp-p signal? Yeah, I
suppose that *COULD* work...

Tim

--
Deep Fryer: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms

 

[Terry Given]

Tim Williams wrote:

"Terry Given" <my_name@ieee.org> wrote in message
news:QTCLe.2776$iM2.241186@news.xtra.co.nz...

Needs to be a big cap I guess?

just plenty bigger than Qgate/Vgate = Cgate


So yeah, a few uF or so, which is huge at this frequency. <g

Oh, I mean a TVS mounted at the device terminals, C-E.

stray L issues again, but if you must....beware the monstrous
capacitance of some of these though. Its cheaper to use your bus caps.


Er, oh yeah, the diodes clamp it within buss limits...
Just have to make a stiff buss. Film caps any use here (maybe a filmlytic?)
or are standard comp-grade caps fine? (I was thinking of 4 or so Nippon
D77421B 780uF 450V caps, if that means anything.)

a typical big electrolytic has > 30nH or so inductance, which is huge
compared to the inductance of your DC bus if using 2 large planes with
small separation (eg PCB or 1.6mm Cu sheets with 0.5mm nomex etc), so
paralleling N of them reduces L by N (cheesy math craps out as L' tends
to Lbus) which is a good start. SMT caps as close as possible to the
IGBT is a common trick, N in parallel is a good plan too. Beware HV smt
ceramic caps, if you thermally stress them (say use a soldering iron)
they develop micro-cracks, and eventually explode

for real big IGBTs, there are film caps you can buy that bolt directly
onto IGBT terminals, with L around the 2-3nH mark. A sneaky bugger I
worked with in the US developed an astonishingly low inductance (3nH or
so) 150uF film cap, we used about 12 of them. Another approach (you
probably wont be able to get it) is super-high-permittivity PCB
material, can get as high as Er = 300 (cf 5 or so for FR4). wasnt that a
horrible tease

get some double-sided copper-clad pcb, and DIY-it. all ya gotta do is
drill holes for the caps, then remove (sharp knife + soldering iron) a
big piece around the "other" terminal.


True...


and acting to give LdI/dt voltage drop every time the IGBTs switch.


Yeah, but not much in comparison to the intended Lmatch that's there anyway.

indeed, so you can ignore it there. just dont ignore it wrt Vce spikes.

I'd do 2-bits of PCB. one as above, and a single-sided bit for the cap
center-point. It'll also help the current sharingh, at the moment the
closest caps do a lot of the HF work (for edges, L dictates current
sharing)


Yeah, that's why I wonder if any film caps would be useful? They'd have to
be pretty large to do much good though.

big//small//really small

ST have some nice app notes showing a few tricks, as does Siliconix.


Ok, will check them out...


thats how real men do it .


Naturally...sigh!


Unnecessary at low power, but above a few
kW its mandatory. Though shalt not fuck with gate supplies....


Think I could get away with 25VCT AC transformer with the secondary bouncing
along at 18kHz 240VAC? That'd save the trouble of making yet another
switching supply inside this thing...

in theory yes. In practice, no - a standard 50Hz xfmr probably wont like
the wicked high dV/dt it'll see - it'll cer5tainly couple metric
shitloads of noise straight into the national grid, there may be
insulation breakdown issues (analogous to first-turn failure in motors)
and the insulation might not be up to scratch. But a carefully
(re-)wound toroid ought to be fine. Before my time, but thats how we did
all our tralington bipolar gate drive supplies (EI actually)

lower IGBTs only is a good start, but think about it, it can be done
quite easily. A (compensated) voltage divider for Vout, as well as Vdc.
A bit of logic....


So just detect a smaller margin (say 1V) off a 24Vp-p signal? Yeah, I
suppose that *COULD* work...

Tim

in practice when an IGBT desats, Vce swings rapidly to full bus volts,
and I sits at about 10*Irated (depends on IGBT type, Vg) so P is wicked
high - thermal inertia of die (at this speed its adiabatic) gives you
about 10us. But the huge voltage swing makes your job a lot easier.

When you build bigger ones, the desat circuitry sits with the gatedrive
cct at the emitter potential of the IGBT, so life is a lot easier (but
you need a fault feedback opto). And of course when the IGBT costs $400
who gives a shit about a few LM339s etc.

Cheers
Terry

 

[Tim Williams]

"Terry Given" <my_name@ieee.org> wrote in message
news:MX_Le.3085$iM2.272489@news.xtra.co.nz...

a typical big electrolytic has > 30nH or so inductance, which is huge
compared to the inductance of your DC bus if using 2 large planes with
small separation (eg PCB or 1.6mm Cu sheets with 0.5mm nomex etc), so
paralleling N of them reduces L by N (cheesy math craps out as L' tends
to Lbus) which is a good start. SMT caps as close as possible to the
IGBT is a common trick, N in parallel is a good plan too. Beware HV smt
ceramic caps, if you thermally stress them (say use a soldering iron)
they develop micro-cracks, and eventually explode

Gack, SMT! Even worse!

Yeah, that's why I wonder if any film caps would be useful? They'd
have to be pretty large to do much good though.

big//small//really small

But how much good does the "really small" do when you've got edges only a
half uS or so wide? (I'm thinking up to 1uS is acceptable so I should be
able to use a variety of IGBTs as far as speed...)

in theory yes. In practice, no - a standard 50Hz xfmr probably wont
like the wicked high dV/dt it'll see - it'll cer5tainly couple metric
shitloads of noise straight into the national grid

That's what line filters are for. <BG> Nah, I wouldn't use a RadioSnack
transformer...I'd at least make sure it has an electrostatic shield and
hi-pot test.

When you build bigger ones, the desat circuitry sits with the gatedrive
cct at the emitter potential of the IGBT, so life is a lot easier (but
you need a fault feedback opto).

Ah, even better, if I'm going to be putting in gate supplies.

How about current/pulse transformers?

And of course when the IGBT costs $400
who gives a shit about a few LM339s etc.

No, you don't understand... it's a miracle I'm even *considering*
transistors in the first place. If it were up to me, and the having of
$1000, I'd have bought a 3CX3000A, set it up and be done two years ago! But
nooo, to save the $900 I have to do all this crap instead. An LM339 is just
another shovel of dirt dug out of my grave... ;^)

Tim

--
Deep Fryer: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms

 

[Terry Given]

Tim Williams wrote:

"Terry Given" <my_name@ieee.org> wrote in message
news:MX_Le.3085$iM2.272489@news.xtra.co.nz...

a typical big electrolytic has > 30nH or so inductance, which is huge
compared to the inductance of your DC bus if using 2 large planes with
small separation (eg PCB or 1.6mm Cu sheets with 0.5mm nomex etc), so
paralleling N of them reduces L by N (cheesy math craps out as L' tends
to Lbus) which is a good start. SMT caps as close as possible to the
IGBT is a common trick, N in parallel is a good plan too. Beware HV smt
ceramic caps, if you thermally stress them (say use a soldering iron)
they develop micro-cracks, and eventually explode


Gack, SMT! Even worse!

only until you get used to it, then you'll never want to design with
leaded parts again. An order-of-magnitude reduction in package L.

Yeah, that's why I wonder if any film caps would be useful? They'd
have to be pretty large to do much good though.

big//small//really small


But how much good does the "really small" do when you've got edges only a
half uS or so wide? (I'm thinking up to 1uS is acceptable so I should be
able to use a variety of IGBTs as far as speed...)

fourier transform + reactance paper = oh, thats why.

in theory yes. In practice, no - a standard 50Hz xfmr probably wont
like the wicked high dV/dt it'll see - it'll cer5tainly couple metric
shitloads of noise straight into the national grid


That's what line filters are for. <BG> Nah, I wouldn't use a RadioSnack
transformer...I'd at least make sure it has an electrostatic shield and
hi-pot test.

bingo.

When you build bigger ones, the desat circuitry sits with the gatedrive
cct at the emitter potential of the IGBT, so life is a lot easier (but
you need a fault feedback opto).


Ah, even better, if I'm going to be putting in gate supplies.

How about current/pulse transformers?

little gate drive pulse xfmrs make nice HF smps xfmrs for gatedrives.

And of course when the IGBT costs $400
who gives a shit about a few LM339s etc.


No, you don't understand... it's a miracle I'm even *considering*
transistors in the first place. If it were up to me, and the having of
$1000, I'd have bought a 3CX3000A, set it up and be done two years ago! But
nooo, to save the $900 I have to do all this crap instead. An LM339 is just
another shovel of dirt dug out of my grave... ;^)

Tim

teaspoon, more like. you obviously dont value your time....but its one
hell of a learning experience.

Cheers
Terry

 

[Tim Williams]

"Terry Given" <my_name@ieee.org> wrote in message
news:Wj7Me.3126$iM2.282826@news.xtra.co.nz...

fourier transform + reactance paper = oh, thats why.

Hmm, ain't got an FT convienient... or simulator, or digital scope...or DMM
(now that last one needs to be replaced, yes)...

How about current/pulse transformers?

little gate drive pulse xfmrs make nice HF smps xfmrs for gatedrives.

I'm sure they do. Hum, I meant that in terms of detecting Ic/Ie, sorry for
being ambiguous

teaspoon, more like. you obviously dont value your time....but its one
hell of a learning experience.

Yeah, the whole thing has been so far!

Hmm.. I'm suprised no one else has replied to this thread.

Tim

--
Deep Fryer: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms

 

[Terry Given]

Tim Williams wrote:

"Terry Given" <my_name@ieee.org> wrote in message
news:Wj7Me.3126$iM2.282826@news.xtra.co.nz...

fourier transform + reactance paper = oh, thats why.


Hmm, ain't got an FT convienient... or simulator, or digital scope...or DMM
(now that last one needs to be replaced, yes)...


How about current/pulse transformers?

little gate drive pulse xfmrs make nice HF smps xfmrs for gatedrives.


I'm sure they do. Hum, I meant that in terms of detecting Ic/Ie, sorry for
being ambiguous

I would never build a circuit that wasnt current-controlled. With a
decent sensor & limit/trip circuit, its easy to make the damn thing
short-circuit proof.

When doing desat tests on a 100kW drive (short an IGBT with a bit of
wire and press start), we had to use a wide, flat strap across the IGBT
to actually make the other one desat, lifting it 100mm above the IGBT
gave enough inductance for the current trip to catch it before a desat.

for years Danfoss used to short the drive outputs while running, at
tradeshows. Very impressive (until you notice they have large output
inductors)

teaspoon, more like. you obviously dont value your time....but its one
hell of a learning experience.


Yeah, the whole thing has been so far!

I was very lucky, my first job was for a crowd that built 250W-1MW
drives, and had done so for years. Wicked fast learning curve, without
having to make most of the common mistakes myself (so I found uncommon
mistakes)

Hmm.. I'm suprised no one else has replied to this thread.

Tim

ditto

Cheers
Terry