Incrementing VHDL FOR loop constant by a value other than 1

[Josh Graham]

Hi all,
Is there anyway to increment a for loop constant in VHDL by a value
that is not equal to one? I am processing a vector and in each
iteration two consecutive elements need to be processed and loop
constant incremented by 2.

Thanks
Josh

 

[Tim Hubberstey]

Josh Graham wrote:

Hi all,
Is there anyway to increment a for loop constant in VHDL by a value
that is not equal to one?

Not that I'm aware of.

I am processing a vector and in each
iteration two consecutive elements need to be processed and loop
constant incremented by 2.

Use a range that is half what you want and then use arithmetic to
generate the values:

for i in start to finish
loop
x(2*i) <= ...
x((2*i)+1) <= ...
end loop;
--
Tim Hubberstey, P.Eng. . . . . . Hardware/Software Consulting Engineer
Marmot Engineering . . . . . . . VHDL, ASICs, FPGAs, embedded systems
Vancouver, BC, Canada . . . . . . . . . . . http://www.marmot-eng.com

 

[Josh Graham]

Thanks Tim
Josh

 

[Nicolas Matringe]

Josh Graham a écrit:

Thanks Tim
Josh

I'm afraid you can't but you can define a second variable that will be a
multiple of your loop variable:

process
variable j : natural range 0 to 56;
begin
for i in 0 to 7 loop
j := 8 * i;
<do whatever you like with j>
end loop;
end process;

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