Including Package in VHDL code as reference

[a_Conan]

Hi,
I find some times VHDL librarries or packages, such as convert.vhd. My
question how can I include these packages in my work as reference as:

use IEEE.std_logic_1164.all;

Thank you

 

[Mike Treseler]

a_Conan wrote:

how can I include these packages in my work as reference as:
use IEEE.std_logic_1164.all;

http://groups.google.com/groups?q=vhdl+somelib

-- Mike Treseler

 

[a_Conan]

ThankYou : )