In layout, can I put circuits under dualmim capacitor?

[Allen]

Hi,

I am making the layout of my circuit that is designed using IBM 7WL
BiCMOS technique. For space sake, I put a circuit under a dualmim
capacitor. It passed the LVS, but I still don't know if it's allowed
to do it that way?
Can anyone give me some advice about this? Thanks.

Regards,
Allen

 

Allen wrote:

Hi,

I am making the layout of my circuit that is designed using IBM 7WL
BiCMOS technique. For space sake, I put a circuit under a dualmim
capacitor. It passed the LVS, but I still don't know if it's allowed
to do it that way?

I don't have documentation for this process, so this is just
general comments for MiM capacitors (and TSMC MiM capacitors,
where I do have experience and documentation).

1) Read the Design Rule documentation carefully. If it's
not forbidden, it's allowed. Assuming you've got an
IBM-provided DRC flow, you've run that, of course, correct?

2) Make sure the bottom plate of your MiM cap is ground, and that
it is well-connected to ground, or that you have a ground
shield underneath the MiM cap. Otherwise, you better make
sure your parasitic extraction tool is capturing the coupling
between the circuit and the bottom plate.

-Jay-