Impedance calculation (CS stage)

Hello.

I am trying to calculate the output impedance for the following circuit
in SPICE notation (CS stage with drain-gate feedback):

* input signal
vin 1 0

* output signal (output port, where impedance should be calculated)
vout 3 0

* resistors
rs 1 2
rf 2 3

* nmos (drain, gate, source, bulk)
mosfet1 3 2 0 0

Unfortunately, I am getting odd results in SPICE, probably because the
circuit I entered was missing the DC bias.

But, apart from SPICE, I would be mainly interested in the analytical
solution as a function of rs and rf...

Can anyone help ?

Thanks !

 

[Jim Thompson]

On Thu, 8 Jun 2017 16:50:06 +0000 (UTC),
electronics@sci.electronics.basics wrote:

Hello.

I am trying to calculate the output impedance for the following circuit
in SPICE notation (CS stage with drain-gate feedback):

* input signal
vin 1 0

* output signal (output port, where impedance should be calculated)
vout 3 0

* resistors
rs 1 2
rf 2 3

* nmos (drain, gate, source, bulk)
mosfet1 3 2 0 0

Unfortunately, I am getting odd results in SPICE, probably because the
circuit I entered was missing the DC bias.

But, apart from SPICE, I would be mainly interested in the analytical
solution as a function of rs and rf...

Can anyone help ?

Thanks !

Approximate MOSFET as a controlled current (drain-to-source of value
gm*Vgs) with drain-to-gate capacitance, Cgd, and gate-to-source
capacitance, Cgs.

For paper analysis you don't include a bias source, you've assumed a
gm value.

For simulation you use a proper MOSFET model and include a bias source
so as to cause enough current to flow to get a good gm.

...Jim Thompson
--
| James E.Thompson | mens |
| Analog Innovations | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| STV, Queen Creek, AZ 85142 Skype: skypeanalog | |
| Voice480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |

Thinking outside the box... producing elegant solutions.

"It is not in doing what you like, but in liking what you do that
is the secret of happiness." -James Barrie

 

[Jim Thompson]

On Sat, 10 Jun 2017 16:01:13 -0700, Jim Thompson
<To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote:

On Thu, 8 Jun 2017 16:50:06 +0000 (UTC),
electronics@sci.electronics.basics wrote:

Hello.

I am trying to calculate the output impedance for the following circuit
in SPICE notation (CS stage with drain-gate feedback):

* input signal
vin 1 0

* output signal (output port, where impedance should be calculated)
vout 3 0

* resistors
rs 1 2
rf 2 3

* nmos (drain, gate, source, bulk)
mosfet1 3 2 0 0

Unfortunately, I am getting odd results in SPICE, probably because the
circuit I entered was missing the DC bias.

But, apart from SPICE, I would be mainly interested in the analytical
solution as a function of rs and rf...

Can anyone help ?

Thanks !

Approximate MOSFET as a controlled current (drain-to-source of value
gm*Vgs) with drain-to-gate capacitance, Cgd, and gate-to-source
capacitance, Cgs.

For paper analysis you don't include a bias source, you've assumed a
gm value.

For simulation you use a proper MOSFET model and include a bias source
so as to cause enough current to flow to get a good gm.

...Jim Thompson

It occurs to me that there is a fundamental problem: Only a resistor,
RF, from drain-to-gate forces the MOSFET to have (at DC), VDS=VGS, in
other words, the _diode_ connection... so impedance measurements will
be at the "knee"... not a very useful value.

...Jim Thompson
--
| James E.Thompson | mens |
| Analog Innovations | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| STV, Queen Creek, AZ 85142 Skype: skypeanalog | |
| Voice480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |

Thinking outside the box... producing elegant solutions.

"It is not in doing what you like, but in liking what you do that
is the secret of happiness." -James Barrie