image processing in vhdl/verilog

hello, can anyone tell me where i can get the VHDL/verilog code for
EZW(embedded zerotree wavelet) algorithm.
else i would like to know how to define a matrix in hdl, and how to
read and write image data into files

 

Hi,

You can read and write images when using the PPM/PNM/PGM file format.
This format is acsii. All pixels are written out, which make it
readable by VHDL in all cases.
It also possible to read binary files, but the result depends our
simulator. That way should be avoided.

A matrix can defined that way:

type col is array(0 to n-1) of std_logic_vector(7 dowonto 0);
type matrix is array(0 to m-1) of col;

For images you should use a dynamic array which can be created with an
access type.

 

On Jul 30, 1:35 pm, tgschw...@tiscalinet.ch wrote:

Hi,

You can read and write images when using the PPM/PNM/PGM file format.
This format is acsii. All pixels are written out, which make it
readable by VHDL in all cases.
It also possible to read binary files, but the result depends our
simulator. That way should be avoided.

A matrix can defined that way:

type col is array(0 to n-1) of std_logic_vector(7 dowonto 0);
type matrix is array(0 to m-1) of col;

For images you should use a dynamic array which can be created with an
access type.

thank you for the information, but using file read write is not
synthesizable, so what do i have to do?

 

[Ralf Hildebrandt]

mk.supriya@gmail.com schrieb:

thank you for the information, but using file read write is not
synthesizable, so what do i have to do?

Think about a transmission from your chip (ASIC / FPGA) to a PC using a
standard interface (RS232, USB, Ethernet, I2C, ...) and saving the
incoming bitstream.

Think about an interface to a removable flash device (SD-Card) and
writing to it.

A microcontroller for the data transmission may be preferrable for any
solution.

Ralf