IES81, OVM 2.0, and Systemverilog parameterized class defini

[guestuser1]

In the OVM2.0 user-guide, they go through some general object-oriented
programming concepts (classes, etc.)

This includes examples with parameterized SV classes:

class my_widget #( parameter int DATA_WIDTH = 32 );
....
endclass : my_widget

typedef struct {
...
} ts_blah;

class my_super_widget #( parameter type T = ts_blah );
....
endclass : my_super_widget

I tried this isolated class-declaration inside Modelsim XE 6.3c, and it
compiled and simulated without problem.
(of course, XE won't do OVM at all.)

But when I tried to compile this in IES81-s006, irun returned a
compile-error.
Apparently, parameterized systemverilog classes are not supported yet.

Am I missing something? Is the OVM 2.0 user's guide just giving abstract
examples that may or may not work on existing OVM-compliant simulators?

 

[Jonathan Bromley]

On Sat, 8 Nov 2008 17:57:45 -0800, "guestuser1"
<guestuser1@nowhere.net> wrote:

In the OVM2.0 user-guide, they go through some general object-oriented
programming concepts (classes, etc.)

This includes examples with parameterized SV classes:

class my_widget #( parameter int DATA_WIDTH = 32 );
...
endclass : my_widget

typedef struct {
...
} ts_blah;

class my_super_widget #( parameter type T = ts_blah );
...
endclass : my_super_widget

I tried this isolated class-declaration inside Modelsim XE 6.3c, and it
compiled and simulated without problem.
(of course, XE won't do OVM at all.)

You need the full-featured product "Questa" to do OVM stuff in
Mentor tools.

But when I tried to compile this in IES81-s006, irun returned a
compile-error.
Apparently, parameterized systemverilog classes are not supported yet.

I think you'll find you need "irun -svpp". Parameterised classes,
and perhaps a few other things, are currently supported by a
preprocessor in IUS/IES. It all works fine, but you must remember
the command-line switch.

Am I missing something? Is the OVM 2.0 user's guide just giving abstract
examples that may or may not work on existing OVM-compliant simulators?

I'm not quite sure what you mean by "OVM-compliant simulator";
since OVM isn't a formal standard, tools can't in any meaningful
way be OVM-compliant. Of course, there's the pragmatic question
of whether a simulator will or won't run the OVM class library.

Not surprisingly, Cadence and Mentor have worked hard to
create an OVM distribution that runs on both vendors' tools.
Take a look at the code examples in the OVM kit; they include
run scripts that should clarify what options you need.

You might find that ovmworld.org is a better place to go with
OVM-related questions.
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services

Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan.bromley@MYCOMPANY.com
http://www.MYCOMPANY.com

The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.

 

[Amal]

You can do OVM on SE as well, as long as you have SystemVerilog
license. I suppose you can even run it on PE if you have
SystemVerilog license. OVM is pure SystemVerilog class library. For
constrained random, functional coverage manager, and other features
you need questa.

-- Amal

On Nov 9, 4:55 am, Jonathan Bromley <jonathan.brom...@MYCOMPANY.com>
wrote:

On Sat, 8 Nov 2008 17:57:45 -0800, "guestuser1"



guestus...@nowhere.net> wrote:
In the OVM2.0 user-guide, they go through some general object-oriented
programming concepts (classes, etc.)

This includes examples with parameterized SV classes:

class my_widget #( parameter int DATA_WIDTH = 32 );
...
endclass : my_widget

typedef struct {
  ...
} ts_blah;

class my_super_widget #( parameter type T =  ts_blah );
...
endclass : my_super_widget

I tried this isolated class-declaration inside Modelsim XE 6.3c, and it
compiled and simulated without problem.
(of course, XE won't do OVM at all.)

You need the full-featured product "Questa" to do OVM stuff in
Mentor tools.

But when I tried to compile this in IES81-s006, irun returned a
compile-error.
Apparently, parameterized systemverilog classes are not supported yet.

I think you'll find you need "irun -svpp".  Parameterised classes,
and perhaps a few other things, are currently supported by a
preprocessor in IUS/IES.  It all works fine, but you must remember
the command-line switch.

Am I missing something?  Is the OVM 2.0 user's guide just giving abstract
examples that may or may not work on existing OVM-compliant simulators?

I'm not quite sure what you mean by "OVM-compliant simulator";
since OVM isn't a formal standard, tools can't in any meaningful
way be OVM-compliant.  Of course, there's the pragmatic question
of whether a simulator will or won't run the OVM class library.

Not surprisingly, Cadence and Mentor have worked hard to
create an OVM distribution that runs on both vendors' tools.
Take a look at the code examples in the OVM kit; they include
run scripts that should clarify what options you need.

You might find that ovmworld.org is a better place to go with
OVM-related questions.
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services

Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan.brom...@MYCOMPANY.comhttp://www.MYCOMPANY.com

The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.