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Hi all,
Can somebody guide me that how can I use ieee_proposed for synthesis.
Can i make library ieee_proposed in Synplify-pro to be used for
synthesizing my VHDL's which uses this library?
David has told in some replies that he used Synplicity for the same.
The package is available at www.eda.org/fphdl
Can somebody guide me that how can I use ieee_proposed for synthesis.
Can i make library ieee_proposed in Synplify-pro to be used for
synthesizing my VHDL's which uses this library?
David has told in some replies that he used Synplicity for the same.
The package is available at www.eda.org/fphdl