Icarus Verilog

[M.P!]

I try to understand how it is working for 2 specific cases.

It has a grammatical rule :

statement -> ...

| K_if '(' expression ')' statement_opt %prec
less_than_K_else
| K_if '(' expression ')' statement_opt K_else statement_opt
| ...
|;

As far as I know from compilers theory (and Left to Right Bottom Up
parsing, as also Icarus Verilgo it is), the above rule should throw
conflict, because, the 2 options of the rule have the same prefix
(e.g. s -> s1 ) ( | s1 s2)

However icarus is a tool, that works, but I can't understand how.

The 2nd issue is that, I want to make a mark, when the compiler, had
read an "if(expr)" (cause I want to take the boolean expression inside
the if,in cases it appears in switch cases, as the input of a state of
one FSM), and not when whole rule "if(expr) stmt" or "if(expr) stmt
else stmt" ends. I have a buffer,that I temporarily store the
(boolean) expressions, and if e.g. we have the code "if(expr1)stmt
else if(expr2) stmt", the compiler first recognize the inner "if
(expr2) stmt" rule, but in my buffer, I also have both expr1 and
expr2, and I dont know, which expressions of the buffer, belong to
which "if()".

P.S. : Maybe another solution than the buffer, might be better,but I
dont want a solution of transforming the grammar of the compiler.The
main problem that I have, and I want to solve, is the 2nd,and I
demand,of an easy way to do it. Problem Revision : I want to match
every (boolean) expression, to the "if" it belongs.