icarus verilog-20031202 - win32 version

P

pini

Guest
Did someone was able to build it on PC.

I got into trouble building this version. According to Steve Williams
it is due to problems of mingw and cygwin tools.

I was able to build previous version without trouble (the last one I
built, with the same tools, is verilog-20030904).

bknpk@hotmail.com wrote:
Full_Name: Pinhas Krengel
Version: verilog-20031202
OS: WINXP
Submission from: (NULL) (192.114.47.54)


My design compiles and runs well with version verilog-20030904.
With version verilog-20031202 I get vvp.tgt: error: target_design
entry point is missing.

The command that I use to compile the design is:
iverilog -o dut.vvp -ctb.f
tb.f is merely a list of verilog files. (again this works okay on
verilog-20030904).


This is probably also a case of mixing up cygwin configure
and mingw compile. The vvp.tgt is dynamically loaded, the
compilers generate slightly different symbol mangling.
--
Steve Williams "The woods are lovely, dark and deep.
steve at icarus.com But I have promises to keep,
http://www.icarus.com and lines to code before I sleep,
http://www.picturel.com And lines to code before I sleep."
 
This fixes the problem.

From : Stephen Williams <steve@icarus.com>
Sent : Monday, January 12, 2004 7:44:16 PM
To : PinhasNBeatris Krengel <bknpk@hotmail.com>
Subject : Re: vvp.tgt: error: target_design entry point is
missing. (PR#911)

|||Inbox


PinhasNBeatris Krengel wrote:
Hi Steve

Can you give me a tip where to look for. I understood
that ivl.exe is the one which fails.


Look in the config.h file to see how the NEED_LU and NEED_TU
defines are set. Then should be undefined.
--
Steve Williams "The woods are lovely, dark and
deep.
steve at icarus.com But I have promises to keep,
http://www.icarus.com and lines to code before I sleep,
http://www.picturel.com And lines to code before I sleep."




bknpk@hotmail.com (pini) wrote in message news:<ca9059d7.0401112251.7569d8aa@posting.google.com>...
Did someone was able to build it on PC.

I got into trouble building this version. According to Steve Williams
it is due to problems of mingw and cygwin tools.

I was able to build previous version without trouble (the last one I
built, with the same tools, is verilog-20030904).

bknpk@hotmail.com wrote:
Full_Name: Pinhas Krengel
Version: verilog-20031202
OS: WINXP
Submission from: (NULL) (192.114.47.54)


My design compiles and runs well with version verilog-20030904.
With version verilog-20031202 I get vvp.tgt: error: target_design
entry point is missing.

The command that I use to compile the design is:
iverilog -o dut.vvp -ctb.f
tb.f is merely a list of verilog files. (again this works okay on
verilog-20030904).


This is probably also a case of mixing up cygwin configure
and mingw compile. The vvp.tgt is dynamically loaded, the
compilers generate slightly different symbol mangling.
 

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