IBUF, IBUFG, OBUF

[rider]

Hi all!

I have a query regarding Xilinx FPGAs and the XST. In many documents
relating FPGA designs, there are such statements as:

BUFG instance_name (.O (user_O),
.I (user_I));

My question is that do we really need to instantiate BUFG, IBUFG etc
in this manner? Isn't this automatically done by the tool(XST etc)?
Lets say i am using a clk signal in my design. I LOC this clk signal
to one of FPGAs IGCLK pad. Wont' the IBUFG primitive be used
automatically? Similarly, does the tool not automatically insert IBUF
and OBUF at the input/output signals?

Thanks

 

[Tullio Grassi]

In principle is as you said, but my experience is that
XST get confused
pretty quickly when your design is more complicated
than just having
a clk signal LOCed to one IGCLK pad.
So I prefer to instantiate all BUFG, IBUFG etc,
to have full control.
This is not usually necessary for normal I/Os (unless they
are bidir, tristate, special voltage levels etc)


Tullio




On 15 Sep 2003, rider wrote:

I have a query regarding Xilinx FPGAs and the XST. In many documents
relating FPGA designs, there are such statements as:

BUFG instance_name (.O (user_O),
.I (user_I));

My question is that do we really need to instantiate BUFG, IBUFG etc
in this manner? Isn't this automatically done by the tool(XST etc)?
Lets say i am using a clk signal in my design. I LOC this clk signal
to one of FPGAs IGCLK pad. Wont' the IBUFG primitive be used
automatically? Similarly, does the tool not automatically insert IBUF
and OBUF at the input/output signals?

Thanks