i2c master ucf

[prachi manglik]

actually we are working on i2c master..
in i2c there is a line SDA i.e. inout line,....
when we want to write on that SDA line then to write the data we need switches or u can say that i have to send data through FPGA board so we need a switch to map that sda line....but i also need SDA as output ...to see when slave acknowledge the master the SDA is hogh or low... so i need it as output too. so when we write U.C.F. (USER CONTRAINT FILE) in ISE DESIGN SUITE for synthesis . then how can i map SDA line as both input as well as output.

 

[Johann Klammer]

On 02/29/2016 03:47 PM, prachi manglik wrote:

actually we are working on i2c master.. in i2c there is a line SDA
i.e. inout line,.... when we want to write on that SDA line then to
write the data we need switches or u can say that i have to send data
through FPGA board so we need a switch to map that sda line....but i
also need SDA as output ...to see when slave acknowledge the master
the SDA is hogh or low... so i need it as output too. so when we
write U.C.F. (USER CONTRAINT FILE) in ISE DESIGN SUITE for synthesis
. then how can i map SDA line as both input as well as output.

BIBUFOD (from the macro lib)
A for the output data.
Q for the input data.
You will need an external pull up.
same for SCL.

(I'm merely guessing)

 

[rndhro]

On 02/29/2016 03:47 PM, prachi manglik wrote:

actually we are working on i2c master..
in i2c there is a line SDA i.e. inout line,....
when we want to write on that SDA line then to write the data we need switches or u can say that i have to send data through FPGA board so we need a switch to map that sda line....but i also need SDA as output ...to see when slave acknowledge the master the SDA is hogh or low... so i need it as output too. so when we write U.C.F. (USER CONTRAINT FILE) in ISE DESIGN SUITE for synthesis . then how can i map SDA line as both input as well as output.

UCF doesn't care about the signal direction. In the UCF you only need a
line like NET "sda" LOC=".." for sda and scl. Declare the sda/scl
signals as type "inout" in verilog and place an IOBUF primitiv to
control the signal direction. Google "Libraries Guide for HDL designs"
for your device to find documentation on how to instantiate it.
Apart from that: there are plenty of open i2c implementations available,
don't waste your time building another one