I heed some help here. (Oops forgot to uplaod image to www

S

Scott Wiper

Guest
I must apologise for this cross posting.

I am stumpted on why this one is not working...

I have checked with my logic probe and my frequency meter. I see the frequency at 2.456MHZ at the clock oscillator and The second part I am getting a breif pulse of 1 HZ at pint 2 on the 4024 to which is carried to pin 10 of the second 4020. The time IC should close the relay for 1 second every hour but it's not doing this and U13 that is not shown on this image. and why the 74ls273 is not being clocked even though the pulse signal is present on pin 1 of the third 4024. The time is for a mechanical totaliser to count hours of opperation.


Please help with this one. I have had some exellent help with other project on these groups. Your input on this problem would be most helpfull. If you need to contact me privately. Please ise the link below.

The image is here for you to review. http://www.travel-net.com/~swiper/7000.gif


--
My cat Tigger says every morning...
"Before my morning coffee... I might as well be a dog!"
To contact folow the link below.
http://www.travel-net.com/~swiper/email.htm
 
"Scott Wiper" <nobody@devnull.spamcop.met> wrote in message news:<MUG8c.10374$kc2.242796@nnrp1.uunet.ca>...
I must apologise for this cross posting.

I am stumpted on why this one is not working...

I have checked with my logic probe and my frequency meter. I see the
frequency at 2.456MHZ at the clock oscillator and The second part I am
getting a breif pulse of 1 HZ at pint 2 on the 4024 to which is carried
to pin 10 of the second 4020. The time IC should close the relay for 1
second every hour but it's not doing this and U13 that is not shown on
this image. and why the 74ls273 is not being clocked even though the
pulse signal is present on pin 1 of the third 4024. The time is for a
mechanical totaliser to count hours of opperation.


Please help with this one. I have had some exellent help with other
project on these groups. Your input on this problem would be most
helpfull. If you need to contact me privately. Please ise the link
below.

The image is here for you to review.
http://www.travel-net.com/~swiper/7000.gif
MR is held low, should be high.
 
I did not look at the whole thing, but you are holding the LS273 in RESET.
That is an active low signal. In general, for trouble shooting extremely
long time constant circuits like this, it would help if you temporarily took
the output from Q1 of the 2020, instead of Q12. Then you could see what is
happening, without waiting an hour.

Tam
"Scott Wiper" <nobody@devnull.spamcop.met> wrote in message
news:MUG8c.10374$kc2.242796@nnrp1.uunet.ca...
I must apologise for this cross posting.

I am stumpted on why this one is not working...

I have checked with my logic probe and my frequency meter. I see the
frequency at 2.456MHZ at the clock oscillator and The second part I am
getting a breif pulse of 1 HZ at pint 2 on the 4024 to which is carried to
pin 10 of the second 4020. The time IC should close the relay for 1 second
every hour but it's not doing this and U13 that is not shown on this image.
and why the 74ls273 is not being clocked even though the pulse signal is
present on pin 1 of the third 4024. The time is for a mechanical totaliser
to count hours of opperation.


Please help with this one. I have had some exellent help with other project
on these groups. Your input on this problem would be most helpfull. If you
need to contact me privately. Please ise the link below.

The image is here for you to review.
http://www.travel-net.com/~swiper/7000.gif


--
My cat Tigger says every morning...
"Before my morning coffee... I might as well be a dog!"
To contact folow the link below.
http://www.travel-net.com/~swiper/email.htm
 
Scott,

I took another look at your schematic. You are really pushing the envelope
here. You have ~2.5MHz going into a 4020, but the part is only guaranteed to
work to 1.5 Mhz at 5V. I would use a 74HC4020. You have an LS20 & LS21?
driving CMOS resets, but that may not work either. You need pullup resistors
on LS outputs to drive CD4XXX logic. Also I can't figure out what D2 is
doing, other than producing a non logic level signal when the LS21 output is
H and the LS20 output is L.

If you designed this, look into CPLDs and FPGAs.

Tam

"Scott Wiper" <nobody@devnull.spamcop.met> wrote in message
news:MUG8c.10374$kc2.242796@nnrp1.uunet.ca...
I must apologise for this cross posting.

I am stumpted on why this one is not working...

I have checked with my logic probe and my frequency meter. I see the
frequency at 2.456MHZ at the clock oscillator and The second part I am
getting a breif pulse of 1 HZ at pint 2 on the 4024 to which is carried to
pin 10 of the second 4020. The time IC should close the relay for 1 second
every hour but it's not doing this and U13 that is not shown on this image.
and why the 74ls273 is not being clocked even though the pulse signal is
present on pin 1 of the third 4024. The time is for a mechanical totaliser
to count hours of opperation.


Please help with this one. I have had some exellent help with other project
on these groups. Your input on this problem would be most helpfull. If you
need to contact me privately. Please ise the link below.

The image is here for you to review.
http://www.travel-net.com/~swiper/7000.gif


--
My cat Tigger says every morning...
"Before my morning coffee... I might as well be a dog!"
To contact folow the link below.
http://www.travel-net.com/~swiper/email.htm
 
Had a bit of time to look
The pulse at pin 6 and 8 of U6 (21 ?) will be brief and will occur
when pin 1 U4 goes low. Since U13 requires a positive transition of
the clock,
this pulse will not be loaded.
To rectify remove U13,and replace with an R S F/F wired
U6 pin6--set, U4 pin1--reset, F/F out--U4 pin2. Rewire the resets so
that this
signal does not reset U2,3. Do the same for U5 wired
U6 pin8--set U5, pin 10--reset, F/F out--U5 pin11. This will give
pulse
59/60 sec at F/F out which can drive the relay via a suitable fet
without the need for U7. Again wire the reset pin11 so that conflicts
do not occur. Use or gates or diode or, eg











. IN1 ->|------.reset
|
|
IN2 ->|------o
|
|
|
.-.
| |
| |
'-'
|
Gnd
created by Andy´s ASCII-Circuit v1.24.140803 Beta www.tech-chat.de
 
What is the purpose of LDR and Thermistor inputs?
Appears to be some superfluous components involved.
Have not found U14!
 

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