how to write text in vhdl

[Tricky]

On Jan 7, 3:17 pm, Jim Lewis <j...@synthworks.com> wrote:

David Bishop wrote:
Xin Xiao wrote:
i want to write some text in the output of my simulation. In my code I
have a variable and I would want that, when the simulation reaches,
say, 10 ns, the simulator writes the text "the variable p is blah blah
". Should I use the instruction "writeline" in my test-bench or there
is another solution? the scope of the variable is outside of the
test-bench.

try time'image

Something like this:

variable L : line;
....
write (L, "The variable P is " & time'image(P) );

I don't think you need a string' here because the output of time'image
is a string.

You may also wish to add a new line:

write (L, "The variable P is " & time'image(P) & LF );

This only writes the string to the line, you then need to do something
with the line itself.
Normally you then use:

writeline(OUTPUT, L);

with this you dont need a LF on the end as the writeline procedure
adds one for you.

If you construct a line using write commands, and want to report it,
use:

report L.all.

This will not flush the line thoug like th writeline procedure.

 

[Xin Xiao]

i want to write some text in the output of my simulation. In my code I have
a variable and I would want that, when the simulation reaches, say, 10 ns,
the simulator writes the text "the variable p is blah blah ". Should I use
the instruction "writeline" in my test-bench or there is another solution?
the scope of the variable is outside of the test-bench.

thanks

 

[David Bishop]

Xin Xiao wrote:

i want to write some text in the output of my simulation. In my code I
have a variable and I would want that, when the simulation reaches, say,
10 ns, the simulator writes the text "the variable p is blah blah ".
Should I use the instruction "writeline" in my test-bench or there is
another solution? the scope of the variable is outside of the test-bench.

try time'image

Something like this:

variable L : line;
.....
write (L, "The variable P is " & time'image(P) );

I don't think you need a string' here because the output of time'image
is a string.

 

[KJ]

"Xin Xiao" <x@x.com> wrote in message
news:flri75$4tk$1@nsnmrro2-gest.nuria.telefonica-data.net...

i want to write some text in the output of my simulation. In my code I have
a variable and I would want that, when the simulation reaches, say, 10 ns,
the simulator writes the text "the variable p is blah blah ". Should I use
the instruction "writeline" in my test-bench or there is another solution?
the scope of the variable is outside of the test-bench.

thanks

If you happen to be inside a process where you want to output the text, you
can simply use 'report'.

report "the variable p is " & integer'image(p) & " at time " &
time'image(now);
report "the variable p is " & std_logic'image(p) & " at time " &
time'image(now);

If 'p' happens to be an integer or std_logic. Unfortunately you can't say
"std_logic_vector'image(p)" if p is a std_logic_vector, you'll need a
function that converts a std_logic_vector into a string. This is not really
a limitation on 'report' you'd have the same issue with the writeline
procedure as well. For a package of functions that do such conversions,
Google for "Ben Cohen" VHDL image_pkg

KJ

 

[Jim Lewis]

David Bishop wrote:

Xin Xiao wrote:
i want to write some text in the output of my simulation. In my code I
have a variable and I would want that, when the simulation reaches,
say, 10 ns, the simulator writes the text "the variable p is blah blah
". Should I use the instruction "writeline" in my test-bench or there
is another solution? the scope of the variable is outside of the
test-bench.

try time'image

Something like this:

variable L : line;
....
write (L, "The variable P is " & time'image(P) );

I don't think you need a string' here because the output of time'image
is a string.

You may also wish to add a new line:

write (L, "The variable P is " & time'image(P) & LF );

 

[Mike Treseler]

Xin Xiao wrote:

Should I use the instruction "writeline" in my test-bench or there is
another solution? the scope of the variable is outside of the test-bench.

I use the modelsim "step" command
to trace code and internal variable values.

-- Mike Treseler

 

[Andy]

On Jan 7, 6:04 am, "KJ" <kkjenni...@sbcglobal.net> wrote:

"Xin Xiao" <x...@x.com> wrote in message

news:flri75$4tk$1@nsnmrro2-gest.nuria.telefonica-data.net...

i want to write some text in the output of my simulation. In my code I have
a variable and I would want that, when the simulation reaches, say, 10 ns,
the simulator writes the text "the variable p is blah blah ". Should I use
the instruction "writeline" in my test-bench or there is another solution?
the scope of the variable is outside of the test-bench.

thanks

If you happen to be inside a process where you want to output the text, you
can simply use 'report'.

report "the variable p is " & integer'image(p) & " at time " &
time'image(now);
report "the variable p is " & std_logic'image(p) & " at time " &
time'image(now);

If 'p' happens to be an integer or std_logic. Unfortunately you can't say
"std_logic_vector'image(p)" if p is a std_logic_vector, you'll need a
function that converts a std_logic_vector into a string. This is not really
a limitation on 'report' you'd have the same issue with the writeline
procedure as well. For a package of functions that do such conversions,
Google for "Ben Cohen" VHDL image_pkg

KJ

If the std_logic_vector does not contain meta values, you can use
something like integer'image(to_integer(unsigned(p))).

Unfortunately, the output would be in decimal (which could be handy at
times!), not binary/hex.

Andy

 

[KJ]

<snip>

If 'p' happens to be an integer or std_logic.  Unfortunately you can't say
"std_logic_vector'image(p)" if p is a std_logic_vector, you'll need a
function that converts a std_logic_vector into a string.  This is not really
a limitation on 'report' you'd have the same issue with the writeline
procedure as well.  For a package of functions that do such conversions,
Google for "Ben Cohen" VHDL image_pkg

KJ

If the std_logic_vector does not contain meta values, you can use
something like integer'image(to_integer(unsigned(p))).

Unfortunately, the output would be in decimal (which could be handy at
times!), not binary/hex.

It also can't be longer than 32 bits.

The nice thing about Ben's package is that you can just say
"image(blah_blah_blah)" without having to know what type
"blah_blah_blah" is (as opposed to integer'image(blah_blah_blah)).
The downside though is that the package, as it exists today, can not
be used inside synthesizable code without surrounding every usage with
"synthesis translate_off/on" pragmas because the package uses access
types and 'deallocate' calls...ahh well.

At some point though, one should arm themselves with a set of
functions that convert types to text strings. Effective log files can
be a useful artifact of a simulation run as well.

KJ

 

[karthik]

Hi

If time variable has real/float values, how can we get those values?
Like,

variable add_result : time := 282.25 NS ;

....
write (L, time'image(add_result));
writeline(output,L);

This just displays : 282

How can I get the whole value?

Thanks in advance.

-- Karthik

On Jan 7, 4:49 am, David Bishop <dbis...@vhdl.org> wrote:

Xin Xiao wrote:
i want to write some text in the output of my simulation. In my code I
have a variable and I would want that, when the simulation reaches, say,
10 ns, the simulator writes the text "the variable p is blah blah ".
Should I use the instruction "writeline" in my test-bench or there is
another solution? the scope of the variable is outside of the test-bench.

try time'image

Something like this:

variable L : line;
....
write (L, "The variable P is " & time'image(P) );

I don't think you need a string' here because the output of time'image
is a string.

 

[Martin Thompson]

karthik <karthikeyan.isha@gmail.com> writes:

Hi

If time variable has real/float values, how can we get those values?

Time variables are not reals or floats - they are integer numbers of
femtoseconds. The use of the other units is a convenience.

Like,

variable add_result : time := 282.25 NS ;

...
write (L, time'image(add_result));
writeline(output,L);

This just displays : 282

Works here...

# vsim -do {run -all} testtime
# // ModelSim PE 6.2d Oct 16 2006
......
# run -all
# 282250 ps

How can I get the whole value?

Have you got your simulator time resolution set to less than
nanoseconds? If not, you will get what you see:

....
# run -all
# 282 ns
#

Cheers,
Martin

--
martin.j.thompson@trw.com
TRW Conekt - Consultancy in Engineering, Knowledge and Technology
http://www.conekt.net/electronics.html

 

[Paul Uiterlinden]

karthik wrote:

Hi

If time variable has real/float values, how can we get those values?
Like,

variable add_result : time := 282.25 NS ;

...
write (L, time'image(add_result));
writeline(output,L);

This just displays : 282

It should work. What simulator are you using?

By the way: it is not needed to use time'image here. You can use write
directly:

write(L, add_result);

Using write this way, you can even specify the unit in which you want the
result to be printed. For example:

write(L, add_result, unit => us);

--
Paul Uiterlinden
www.aimvalley.nl
e-mail addres: remove the not.