S
sm.soimu@gmail.com
Guest
Hello,
I would like to write in VHDL an equivalent code for:
parameter INSTANCE = 1;
parameter DATA_WIDTH = (INSTANCE == 1) ? 8 : 16;
The equivalent for parameter statement should be generic or constant,
but I see no way to write the equivalent VHDL code for the above
VERILOG code.
Can anyone suggest any way to write it?
Thank you in advance!
Regards,
Sorin SOIMU
I would like to write in VHDL an equivalent code for:
parameter INSTANCE = 1;
parameter DATA_WIDTH = (INSTANCE == 1) ? 8 : 16;
The equivalent for parameter statement should be generic or constant,
but I see no way to write the equivalent VHDL code for the above
VERILOG code.
Can anyone suggest any way to write it?
Thank you in advance!
Regards,
Sorin SOIMU