How to use PERL for verification purposes!

[Vick]

Hello,

I have written this Verilog code where Commands are passed from the
Host to the Card which in turn responds back. Also, I have included a
triggering mechanisms for these COmmands/Responses.

Can industry experts tell me if I could use PERL for verification
purposes. Also under which situations using PERL is beneficial!
Please provide some examples...

Thanx...

 

[Vick]

Looks like no ones has any ideas/suggestions on how to use PERL for
verification purposes. I need some tutorials/books on using PERL
specifically for RTL verification. I have written the test bench for
the COmmands/reponse triggering mechanism verification. But how could
i benefit using PERL if possible.

-V


iamyourengineer2004@hotmail.com (Vick) wrote in message news:<c373aa10.0411201012.3193c978@posting.google.com>...

Hello,

I have written this Verilog code where Commands are passed from the
Host to the Card which in turn responds back. Also, I have included a
triggering mechanisms for these COmmands/Responses.

Can industry experts tell me if I could use PERL for verification
purposes. Also under which situations using PERL is beneficial!
Please provide some examples...

Thanx...

 

[???]

I'm trying to use python as HVL now.

"Vick" <iamyourengineer2004@hotmail.com> wrote in message
news:c373aa10.0411201012.3193c978@posting.google.com...

Hello,

I have written this Verilog code where Commands are passed from the
Host to the Card which in turn responds back. Also, I have included a
triggering mechanisms for these COmmands/Responses.

Can industry experts tell me if I could use PERL for verification
purposes. Also under which situations using PERL is beneficial!
Please provide some examples...

Thanx...

 

[Jan Decaluwe]

Vick wrote:

Hi Arnold,

I got more replies saying that they too are using Python for
verification instead of perl. It seems that earlier Python wasnt used
much for verification but now its gaining popularity. So can you give
me an example as to how could I use it for verification.

You may be interested in taking a look at MyHDL, a Python
package to use Python as a HDL and, naturally, as a HVL,
starting from here:

http://jandecaluwe.com/Tools/MyHDL/Overview.html

--
Jan Decaluwe - Resources bvba - http://jandecaluwe.com
Losbergenlaan 16, B-3010 Leuven, Belgium
Python is fun, and now you can design hardware with it:
http://jandecaluwe.com/Tools/MyHDL/Overview.html

 

[dannyn]

Vick wrote:

Hello,

I have written this Verilog code where Commands are passed from the
Host to the Card which in turn responds back. Also, I have included a
triggering mechanisms for these COmmands/Responses.

Can industry experts tell me if I could use PERL for verification
purposes. Also under which situations using PERL is beneficial!
Please provide some examples...

Thanx...

If you are looking for Verilog/Perl interoperability, have a look at
this project:
http://sourceforge.net/projects/vtracer

You will find there how Verilog and Perl are linked together with the
VPI (PLI2.0) i/f.

 

[Carl W.]

Vick wrote:

Looks like no ones has any ideas/suggestions on how to use PERL for
verification purposes. I need some tutorials/books on using PERL
specifically for RTL verification. I have written the test bench for
the COmmands/reponse triggering mechanism verification. But how could
i benefit using PERL if possible.

It seems backwards to want to use a specific tool (Perl)
for a set of different tasks that may require different tools.
TCL is the preferred language in my group because it seems to
be 'built in' to some of the simulators we use.

Anyway, the generic Perl books coupled with your simulator's
PLI and/or VPI manuals should be enough to get you started.

+ Generic Perl Books
- Programming Perl, 3rd Edition, O'Reilly
- Advanced Perl Programming, Sriram Srinivasan

+ PLI & VPI Manuals are included with several
commercial simulators.

As an example, I wrote a Perl script to scan my
'-f ' file, then scan the Verilog files in it & show
the hierarchy of the test I'm using. After that, I was
scanning the VPI manual and found that they had a very
much simpler example of a VPI which showed the test's
hierarchy. I could've saved some time if I had
said "I want a tool to show the hierarchy of
a test" and looked in various places for that tool
instead of initially deciding that I wanted to use Perl
to write that tool. Another idea -- check to see if your
simulator(a) have TCL built into it (at least one
commercial simulator does). If so, it may be to your
advantage to learn TCL & write your next testbench in TCL.

 

[Swapnajit Mittra]

iamyourengineer2004@hotmail.com (Vick) wrote in message news:<c373aa10.0411262133.330b75da@posting.google.com>...

Looks like no ones has any ideas/suggestions on how to use PERL for
verification purposes. I need some tutorials/books on using PERL
specifically for RTL verification. I have written the test bench for
the COmmands/reponse triggering mechanism verification. But how could
i benefit using PERL if possible.

-V

Almost all programming languages can be used for doing
something - at least to some extent - that it is not
supposed to do. People have used COBOL for writing OS,
SNOBOL for writing spreadsheets and, lo and behold,
Perl for writing simulators. I was unfortunate enough
to experience the last (and fortunately, not the first
two). You will see a whole lot more examples if you
search the archive for this newsgroup. To the best of
my knowledge, I have never seen any of these being
what can be termed as remotely successful. On the
contrary, at least in one case, it helped a promising
company to go out of business.

This does not mean, of course, Perl (or any other
language) does not have any utility in verification.
As long as you are using it for its own domain - Perl/Tcl
for scripting, C/C++ for verif library etc. - you
can only be benefitted. But, overstretching utility
of a programming language only gives you a chance in
making history, if you can ever make it.

- Swapnajit.
--
SystemVerilog DPI tutorial on Project VeriPage:
http://www.project-veripage.com/dpi_tutorial_1.php
For subscribing to Project VeriPage mailing list:
<URL: http://www.project-veripage.com/list/?p=subscribe&id=1>

 

[Vick]

Hi Arnold,

I got more replies saying that they too are using Python for
verification instead of perl. It seems that earlier Python wasnt used
much for verification but now its gaining popularity. So can you give
me an example as to how could I use it for verification. Like say for
example, if I have a FSM model,I can always test it using vector
generation. These vectors (walking 1's, 0's and combination of both)
can be easily generated using PERL (or) a C code.

The reason I am asking about PERL and Python are bcos I have not used
them for verification. And since most often I have seen in peoples
experiences that they have used it for verification but never specify
it as to how?

I am experienceing that testing /verification really takes lots of
time/effort especially if you are doing both the designing and
verification.

Also I have heard some say that Python/PERL is used for making a
'verification environment" what does that imply?

Anyways I have familiarised with the PERL syntax/constructs in the
past week. And now I have this verilog code (Host) which sends
Commands to MMC and inturn receives Responses. How can Python/Perl
help me? Bcso rite now I have the vectors generated as said above and
verifying the code.

Thanx for all the answers,
-V



"???" <Arnold.bbs@bbs.sjtu.edu.cn> wrote in message news:<coirru$2d2b$1@mail.cn99.com>...

I'm trying to use python as HVL now.

"Vick" <iamyourengineer2004@hotmail.com> wrote in message
news:c373aa10.0411201012.3193c978@posting.google.com...
Hello,

I have written this Verilog code where Commands are passed from the
Host to the Card which in turn responds back. Also, I have included a
triggering mechanisms for these COmmands/Responses.

Can industry experts tell me if I could use PERL for verification
purposes. Also under which situations using PERL is beneficial!
Please provide some examples...

Thanx...

 

[Chun Lin Zhang]

With MyHDL package for python, I can co-simulate Verilog with Python. You
can get the related information for MyHDL website.

From my understanding 'verification environment' means testbench, supporting
scripts, and test suite.

Correct me if I'm wrong.

We can further discuss python verification methodology with msn if you
want, my account is chun_lin_zhang@hotmail.com

"Vick" <iamyourengineer2004@hotmail.com> wrote in message
news:c373aa10.0411302032.d772112@posting.google.com...

Hi Arnold,

I got more replies saying that they too are using Python for
verification instead of perl. It seems that earlier Python wasnt used
much for verification but now its gaining popularity. So can you give
me an example as to how could I use it for verification. Like say for
example, if I have a FSM model,I can always test it using vector
generation. These vectors (walking 1's, 0's and combination of both)
can be easily generated using PERL (or) a C code.

The reason I am asking about PERL and Python are bcos I have not used
them for verification. And since most often I have seen in peoples
experiences that they have used it for verification but never specify
it as to how?

I am experienceing that testing /verification really takes lots of
time/effort especially if you are doing both the designing and
verification.

Also I have heard some say that Python/PERL is used for making a
'verification environment" what does that imply?

Anyways I have familiarised with the PERL syntax/constructs in the
past week. And now I have this verilog code (Host) which sends
Commands to MMC and inturn receives Responses. How can Python/Perl
help me? Bcso rite now I have the vectors generated as said above and
verifying the code.

Thanx for all the answers,
-V



"???" <Arnold.bbs@bbs.sjtu.edu.cn> wrote in message
news:<coirru$2d2b$1@mail.cn99.com>...
I'm trying to use python as HVL now.

"Vick" <iamyourengineer2004@hotmail.com> wrote in message
news:c373aa10.0411201012.3193c978@posting.google.com...
Hello,

I have written this Verilog code where Commands are passed from the
Host to the Card which in turn responds back. Also, I have included a
triggering mechanisms for these COmmands/Responses.

Can industry experts tell me if I could use PERL for verification
purposes. Also under which situations using PERL is beneficial!
Please provide some examples...

Thanx...