How to use differential clock pin of SpartanIIE?

[Warine]

I try to use differential clock pin with component "ibufgds", but ise5.1i
reports error:"SpartanIIE doesn't support symbol ibufgds". The online
documentation of ise5.1i says "ibufgds" is N/A in SpartanIIE. How can I
use differential clock pin of SpartanIIE?

Thanks
Warine

 

[John Retta]

[1] Here is some verilog sample code for IBUFG for LVPECL :

IBUFG_LVPECL buf_000_p (.I(pad_sys_clk_100mhz_p),
.O(sys_clk_100mhz) );
IBUFG_LVPECL buf_000_n (.I(pad_sys_clk_100mhz_n), .O() );

[2] Generally, take a look at the lib.pdf in the installed directory
C:\xilinx\doc\usenglish\docs\lib. This is the perfect document to
check which Xilinx primitives are available in each family. Also,
contains examples for instantiation, as well as associated .ucf
references.

--
Regards,
John Retta
Owner and Designer
Retta Technical Consulting Inc.

email : jretta@rtc-inc.com
web : www.rtc-inc.com


"Warine" <xk_ch@163.com> wrote in message
news:7124b232.0312200615.4dc0e37a@posting.google.com...

I try to use differential clock pin with component "ibufgds", but ise5.1i
reports error:"SpartanIIE doesn't support symbol ibufgds". The online
documentation of ise5.1i says "ibufgds" is N/A in SpartanIIE. How can I
use differential clock pin of SpartanIIE?

Thanks
Warine