How to understand the different CRC formats?

[fl]

Hi,

I read a post on this forum about CRC:
https://groups.google.com/forum/#!searchin/comp.lang.vhdl/crc/comp.lang.vhdl/GL1irJS6WrA/FiBxmFXal24J

I can run this routine through simulation. In the same time, my Matlab can generate the same results with CCITT (x^16+x^12+x^5+1). The initial generator
states are all '0'. When the message bits are 0x80000, the checksum is 0x1B98.

When I check website:

http://www.lammertbies.nl/comm/info/crc-calculation.html

There are several kinds of CCITT, such as xModem, 0xFFFF etc. I have tried
different kinds of initial states, byte order etc., but no one can generate
the same results of the simulation program and Matlab result. Could you tell me
what format can result in the differences?



Second, the original code is very good. I know some FPGA vendors sell CRC IP.
I would like to know what advantage of their design comparing to the Mike
Treseler's code?





Thanks,

 

[Mark Curry]

In article <79e0ac75-a108-424c-b982-41bd68ad1082@googlegroups.com>,
fl <rxjwg98@gmail.com> wrote:

Hi,

I read a post on this forum about CRC:
https://groups.google.com/forum/#!searchin/comp.lang.vhdl/crc/comp.lang.vhdl/GL1irJS6WrA/FiBxmFXal24J

I can run this routine through simulation. In the same time, my Matlab can generate the same results with CCITT (x^16+x^12+x^5+1). The initial generator
states are all '0'. When the message bits are 0x80000, the checksum is 0x1B98.

When I check website:

http://www.lammertbies.nl/comm/info/crc-calculation.html

There are several kinds of CCITT, such as xModem, 0xFFFF etc. I have tried
different kinds of initial states, byte order etc., but no one can generate
the same results of the simulation program and Matlab result. Could you tell me
what format can result in the differences?



Second, the original code is very good. I know some FPGA vendors sell CRC IP.
I would like to know what advantage of their design comparing to the Mike
Treseler's code?

Not specifically answering your questions but...

My favorite paper on CRCs is here:
http://www.ross.net/crc/download/crc_v3.txt

It's old (1993) - but entire valid today. It describes, pretty much
every way you can do a CRC. Ross describes CRCs in general, with examples.
Then lists a way of fully specifying any CRC. Many standard examples (like
CCITT) are included.

Take an hour or so and read this paper. If you're looking at this
from a hardware angle (which I think you are, as you're asking this
question in a VHDL newsgroup), then you can STOP READING after section
8. Past this part of the paper Ross begins to describe
how CRC's are efficiently done in SW. YOU DON'T NEED TO KNOW
this first time.

CRC's in HW are really simple. Don't let the SW
"Table-Driven Implementations" cloud your head right now.

Just focus on the first part of the paper.

Regards,

Mark