How to understand obfuscated IP codes?

[Sumathigokul]

Hi,

Good day to all.

If suppose i received a HDL code for FPGA related design and it i
obfuscated, how to understand it??? Is there any systematic procedure t
perform it??

Thank you in advance.

Regards,
SUMATHI G.


--------------------------------------
Posted through http://www.FPGARelated.com

 

[kaz]

Hi,

Good day to all.

If suppose i received a HDL code for FPGA related design and it is
obfuscated, how to understand it??? Is there any systematic procedure to
perform it??

Thank you in advance.

Regards,
SUMATHI G.


---------------------------------------
Posted through http://www.FPGARelated.com

It could be a nightmare. If you just want to view it as blackbox then ru
a testbench of your own with your inputs and reference outputs. Man
designers have no mercy about readability or comments or documentation.

Alternatively post this on DSPRelated and I guarantee you will get 8
replies at least from the 5 robots there. Seriously

Kaz
--------------------------------------
Posted through http://www.FPGARelated.com

 

[David Wade]

On 09/09/2015 15:07, kaz wrote:

Hi,

Good day to all.

If suppose i received a HDL code for FPGA related design and it is
obfuscated, how to understand it??? Is there any systematic procedure to
perform it??

Thank you in advance.

Regards,
SUMATHI G.


---------------------------------------
Posted through http://www.FPGARelated.com

It could be a nightmare. If you just want to view it as blackbox then run
a testbench of your own with your inputs and reference outputs. Many
designers have no mercy about readability or comments or documentation.

Alternatively post this on DSPRelated and I guarantee you will get 89
replies at least from the 5 robots there. Seriously

Kaz
---------------------------------------
Posted through http://www.FPGARelated.com

Depends on how complex. Look at the generated RTL perhaps.....

 

[Mike Field]

On Thursday, 10 September 2015 00:11:48 UTC+12, Sumathigokul wrote:

Hi,

Good day to all.

If suppose i received a HDL code for FPGA related design and it is
obfuscated, how to understand it??? Is there any systematic procedure to
perform it??

Thank you in advance.

Regards,
SUMATHI G.


---------------------------------------
Posted through http://www.FPGARelated.com

Wouldn't hold out much hope. On anything sufficiently complex you can have a full description of the low-level implementation, but not enough context to give full understanding of what is actually being implemented.

e.g. Take this description - what does it do?

There is a single bit register, and it gets XORed with the value that is from a 1-bit x 256 table, indexed by the 8-bit input, After that the 8-bit number plus the bit is used to index another 10-bit x 512 table, containing seemingly random values, to generate the final output value.

 

[Thomas Stanka]

Am Mittwoch, 9. September 2015 14:11:48 UTC+2 schrieb Sumathigokul:

If suppose i received a HDL code for FPGA related design and it is
obfuscated, how to understand it??? Is there any systematic procedure to
perform it??

I assume you paid money to get this code. I would request documentation and read it.

For obfuscated code it is really hard to tell
a <= b + c is iteself hard to read when you have no context, but this is considered not obfuscated. Real obfuscting could be:

a010000:=a001001+1+1
a010100<=a010000+a00100-2