how to tpye always block quickly

[Yang Luo]

when using verilog translating computing module, we need insert flip-flop according to delay. actually it's ''always" block, so how to quickly type always block? the common texteditor, like vim,ue,notepad++, is there a script or command to generare always block template?

 

[Allan Herriman]

On Mon, 11 Jan 2016 08:20:06 -0800, Yang Luo wrote:

when using verilog translating computing module, we need insert
flip-flop according to delay. actually it's ''always" block, so how to
quickly type always block? the common texteditor, like vim,ue,notepad++,
is there a script or command to generare always block template?

Here is an example in Vim. Typing one of the abbreviations
ar@ al@ or al*
when in insert mode will cause it to prompt for a label.
Either enter a label and hit enter,
or just hit enter if you don't want a label.



" get value of label from user and patch it into code in always block
function! AlwaysLabel()
normal mt
let label = input("Enter a block ID for the always block : ")
if label =~? '\i'
" patch label over BLKID
execute "?always?,'t g/^/s/<BLKID>/".label."/"
else
" No label entered - remove BLKID and ':' character
execute "?always?,'t g/^/s/[ :/]*<BLKID>//"
endif
normal `t
endfunction



" always block with clk and gsr (async active high reset)
iabbr ar@ always @(posedge clk, posedge gsr)<CR>
\begin : <BLKID><CR>
\if (gsr) begin<CR>
\<CR>
\end else if (clk_enable) begin<CR>
\<CR>
\end<CR>
\end // <BLKID><CR>
\<ESC>:call AlwaysLabel()<CR>

" always block with clk
iabbr al@ always @(posedge clk)<CR>
\begin : <BLKID><CR>
\if (clk_enable) begin<CR>
\<CR>
\end<CR>
\end // <BLKID><CR>
\<ESC>:call AlwaysLabel()<CR>

" always block with 2001 style combinatorial sensitivity list
iabbr al* always @*<CR>
\begin : <BLKID><CR>
\end // <BLKID><CR>
\<ESC>:call AlwaysLabel()<CR>

 

[rickman]

On 1/11/2016 11:20 AM, Yang Luo wrote:
> when using verilog translating computing module, we need insert flip-flop according to delay. actually it's ''always" block, so how to quickly type always block? the common texteditor, like vim,ue,notepad++, is there a script or command to generare always block template?

I use codewright for VHDL which does not generate boilerplate even
though it would be nice. I just copy and paste from existing code. On
the other hand, I type pretty fast so that a clocked process is pretty
easy for me. A much bigger deal is the triplicate typing required to
instantiate a component. There I copy the entity declaration and use
scripts to create the component instantiation and signals list. Even
then typing is required when the signals list creates duplicates. VHDL
is *really* wordy. I don't know what you are going on about with the
always block in Verilog. .

If I were smart (and doing a lot of VHDL coding at any given moment) I
would create a boiler plate file just for the purpose of facilitating my
typing. Not only include all the starting points in various code
structures I use (for quick copy and paste), but provide notes for the
many issues not encountered so often so I don't have to dig on the
Internet every time I can't recall how something is supposed to work.

--

Rick

 

[Yang Luo]

thanks a lot. I'm learning vim for quick coding verilog