Guest
Hi guys,
I would like to simulate a simple matched differentail amplifier.
If I am interested in only Vth variation, how can I simulate the
mismatch effect?
I put the dc voltage source (2sigma_vth variation) in series with gate
of + input transistor and put dc voltage source(-2sigma_vth variation)
in series with gate of - input transistor.
Is this way correct?
And usually how many sigma_vth variation are used for mismatch
simulation?
Thanks.
h.s
I would like to simulate a simple matched differentail amplifier.
If I am interested in only Vth variation, how can I simulate the
mismatch effect?
I put the dc voltage source (2sigma_vth variation) in series with gate
of + input transistor and put dc voltage source(-2sigma_vth variation)
in series with gate of - input transistor.
Is this way correct?
And usually how many sigma_vth variation are used for mismatch
simulation?
Thanks.
h.s