How to select a FPGA

Hi,
I've almost finished the RTL for the design.
The question I have is how do I know how large my design is before selecting a FPGA?

thank you

Stanley

 

[Simon Peacock]

by trial and error..

Just place it and see.. start with a 150 and then go up or down as required.



<sc01@hotmail.com> wrote in message
news:Uisib.4367$zw4.3042@nwrdny01.gnilink.net...

Hi,
I've almost finished the RTL for the design.
The question I have is how do I know how large my design is before
selecting a FPGA?

thank you

Stanley

 

[Peter Alfke]

Here is a beginning.
Look at your design:
How many flip-flops, how many BlockRAMs, how many multipliers (if any),
how many different clocks, and how many I/O?
It should only take minutes to answer these questions. Then you look at
the overview in the data sheet and select an FPGA that has at least what
you need.

Peter Alfke, Xilinx Applications
============================
sc01@hotmail.com wrote:

Hi,
I've almost finished the RTL for the design.
The question I have is how do I know how large my design is before selecting a FPGA?

thank you

Stanley

 

[Vinh Pham]

I've almost finished the RTL for the design.

Do you mean you're almost finish writing the HDL? If so the easiest thing
to do is send it through your synthesizer and see what logic usage it
reports.

If you haven't written the HDL, the next question is whether you think you
have enough time to write the HDL before having to make a decission on a
FPGA. The HDL doesn't have to be functionally correct, so you don't have to
waste time debugging it. You just have to make sure the synthesizer isn't
optimizing logic away due to a coding error. You still have to make a
ballpark guess so you can do a sanity check on what the synthesizer reports.

I'm not sure if the following situation applies to you but here goes:

If the PCB folks need a decission sooner, then you gotta make an educated
guess and tack on some safety margin. If you're lucky, there is a previous
design which is very similar to yours, that you can use. If there's a lot
of reptitive logic, that can make it easier since you just figure out the
size of one block and multiply by how often it's instantiated. If your
design is datapath heavy, then concentrate more on the datapath logic and
make a rough guess for your control logic.

Also remember that a lot of FPGAs come in different sizes (logic wise) but
have the same packaging/PCB-footprint. So you can give the PCB folks a
package that they can start working with, while you have some freedom in
picking a size. If your design turns out to be larger than you guess, you
might be able to choose a larger size FPGA in the same package. You have to
make sure such a larger part exists, what the lead time is, and the price.
Be sure to ask your chip vendor for that information on all the sizes in a
given package. Also remember that when it comes to choosing a package, the
main thing is to make sure it has enough I/O for your needs, so usually you
worry about I/O first, then logic.


--Vinh

 

[Uwe Bonnes]

Peter Alfke <peter@xilinx.com> wrote:
: Here is a beginning.
: Look at your design:
: How many flip-flops, how many BlockRAMs, how many multipliers (if any),
: how many different clocks, and how many I/O?
: It should only take minutes to answer these questions. Then you look at
: the overview in the data sheet and select an FPGA that has at least what
: you need.

Also have a look at the package option and the availability too...
--
Uwe Bonnes bon@elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------

 

[H. Peter Anvin]

Followup to: <Uisib.4367$zw4.3042@nwrdny01.gnilink.net>
By author: <sc01@hotmail.com>
In newsgroup: comp.arch.fpga

Hi,
I've almost finished the RTL for the design.
The question I have is how do I know how large my design is before selecting a FPGA?

If you already have the RTL, the easiest is to let the synthesis tools
tell you ... both the Xilinx and Altera tools have teh option of
"pick a device". If the resulting device is very full, you may want
to pick one size larger just in case you need to change your design in
the future. This applies to some applications, but not to all.

-hpa
--
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